Issued Patents All Time
Showing 51–75 of 243 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10497457 | DRAM retention test method for dynamic error correction | Frederick A. Ware, Suresh Rajan, Thomas Vogelsang | 2019-12-03 |
| 10381067 | Memory system topologies including a buffer device and an integrated circuit memory device | Ian Shaeffer, Craig E. Hampel | 2019-08-13 |
| 10360972 | Memories and memory components with interconnected and redundant data interfaces | Frederick A. Ware, John Eric Linstadt, Thomas J. Giovannini, Scott C. Best, Kenneth L. Wright | 2019-07-23 |
| 10236051 | Memory controller | Frederick A. Ware, Richard E. Perego, Craig E. Hampel | 2019-03-19 |
| 10223309 | Dynamic random access memory (DRAM) component for high-performance, high-capacity registered memory modules | Frederick A. Ware, John Eric Linstadt, Thomas J. Giovannini, Kenneth L. Wright | 2019-03-05 |
| 10210080 | Memory controller supporting nonvolatile physical memory | Frederick A. Ware | 2019-02-19 |
| 10192609 | Memory component with pattern register circuitry to provide data patterns for calibration | Craig E. Hampel, Richard E. Perego, Stefanos Sidiropoulos, Frederick A. Ware | 2019-01-29 |
| 10191822 | High performance persistent memory | Frederick A. Ware, J. James Tringali | 2019-01-29 |
| 10170170 | Memory control component with dynamic command/address signaling rate | Frederick A. Ware, Brian S. Leibowitz, Wayne F. Ellis, Akash Bansal, John Brooks +1 more | 2019-01-01 |
| 10095565 | Memory controller with error detection and retry modes of operation | Mark A. Horowitz, Frederick A. Ware | 2018-10-09 |
| 10084644 | Portable universal personal storage, entertainment, and communication device | Megan Tsern, David J. Mooring, Michael Mooring | 2018-09-25 |
| 10026666 | Stacked die package with aligned active and passive through-silicon vias | Nitin Juneja, Wendemagegnehu Beyene, David A. Secker | 2018-07-17 |
| 9865329 | Memory system topologies including a buffer device and an integrated circuit memory device | Ian Shaeffer, Craig E. Hampel | 2018-01-09 |
| 9847248 | Method of making a stacked device assembly | Frederick A. Ware, Ian Shaeffer | 2017-12-19 |
| 9843315 | Data transmission using delayed timing signals | Frederick A. Ware, Brian S. Leibowitz, Jared L. Zerbe | 2017-12-12 |
| 9842630 | Memory component with adjustable core-to-interface data rate ratio | Frederick A. Ware | 2017-12-12 |
| 9836348 | Memory repair method and apparatus based on error code tracking | Frederick A. Ware | 2017-12-05 |
| 9824036 | Memory systems with multiple modules supporting simultaneous access responsive to common memory commands | Richard E. Perego, Donald C. Stark, Frederick A. Ware, Craig E. Hampel | 2017-11-21 |
| 9818463 | Memory control component with inter-rank skew tolerance | Frederick A. Ware, Brian S. Leibowitz, Wayne F. Ellis, Akash Bansal, John Brooks +1 more | 2017-11-14 |
| 9741424 | Memory controller | Frederick A. Ware, Richard E. Perego, Craig E. Hampel | 2017-08-22 |
| 9721642 | Memory component with pattern register circuitry to provide data patterns for calibration | Craig E. Hampel, Richard E. Perego, Stefanos Sidiropoulos, Frederick A. Ware | 2017-08-01 |
| 9691504 | DRAM retention test method for dynamic error correction | Frederick A. Ware, Suresh Rajan, Thomas Vogelsang | 2017-06-27 |
| 9665430 | Memory system with error detection and retry modes of operation | Mark A. Horowitz, Frederick A. Ware | 2017-05-30 |
| 9563597 | High capacity memory systems with inter-rank skew tolerance | Frederick A. Ware, Brian S. Leibowitz, Wayne F. Ellis, Akash Bansal, John Brooks +1 more | 2017-02-07 |
| 9563583 | Memory system topologies including a buffer device and an integrated circuit memory device | Ian Shaeffer, Craig E. Hampel | 2017-02-07 |