Issued Patents All Time
Showing 1–8 of 8 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12087681 | Packaged integrated device with memory buffer integrated circuit die and memory devices on module substrate | Shahram Nikoukary, Jonghyun Cho, Ming Li | 2024-09-10 |
| 11742277 | Packaged integrated device having memory buffer integrated circuit asymmetrically positioned on substrate | Shahram Nikoukary, Jonghyun Cho, Ming Li | 2023-08-29 |
| 10026666 | Stacked die package with aligned active and passive through-silicon vias | Wendemagegnehu Beyene, David A. Secker, Ely Tsern | 2018-07-17 |
| 6452262 | Layout of Vdd and Vss balls in a four layer PBGA | — | 2002-09-17 |
| 6406936 | Method for increasing trace rows of a ball grid array | — | 2002-06-18 |
| 6396140 | Single reference plane plastic ball grid array package | Aritharan Thurairajaratnam | 2002-05-28 |
| 6225690 | Plastic ball grid array package with strip line configuration | Aritharan Thurairajaratnam | 2001-05-01 |
| 6127728 | Single reference plane plastic ball grid array package | Aritharan Thurairajaratnam | 2000-10-03 |