Issued Patents All Time
Showing 1–10 of 10 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12057159 | Memory system with burst mode having logic gates as sense elements | Pramod Kolar, Stephen Edward Liles | 2024-08-06 |
| 11699483 | Memory system with burst mode having logic gates as sense elements | Pramod Kolar, Stephen Edward Liles | 2023-07-11 |
| 9070551 | Method and apparatus for a diffusion bridged cell library | Benjamin J. Bowers, James W. Hayward, Charanya Gopal, Robert J. Bucki, Chock Hing Gan +3 more | 2015-06-30 |
| 8782576 | Method and apparatus for a diffusion bridged cell library | Benjamin J. Bowers, James W. Hayward, Charanya Gopal, Robert J. Bucki, Chock Hing Gan +3 more | 2014-07-15 |
| 8578117 | Write-through-read (WTR) comparator circuits, systems, and methods use of same with a multiple-port file | Michael Scott McIlvaine, Nathan Samuel Nunamker, Yeshwant Nagaraj Kolla | 2013-11-05 |
| 8315078 | Power saving static-based comparator circuits and methods and content-addressable memory (CAM) circuits employing same | Jason Philip Martzloff, Yeshwant Nagaraj Kolla | 2012-11-20 |
| 7698536 | Method and system for providing an energy efficient register file | James Norris Dieffenderfer, Thomas Andrew Sartorius, Jeffrey Todd Bridges, Michael Scott McIlvaine | 2010-04-13 |
| 7242624 | Methods and apparatus for reading a full-swing memory array | Yeshwant Nagaraj Kolla, Jeffrey Herbert Fischer | 2007-07-10 |
| 6735145 | Method and circuit for optimizing power consumption and performance of driver circuits | Francois Ibrahim Atallah, Anthony Correale, Jr. | 2004-05-11 |
| 6320419 | Non-latency affected contention prevention during scan-based test | Jeffrey Herbert Fischer, Robert Anthony Paniccia | 2001-11-20 |