Issued Patents All Time
Showing 1–22 of 22 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12412611 | Time decoupled write operations for non-linear polar material based memory | Rajeev Kumar Dokania, Mustansir Yunus Mukadam, Darshak Doshi, Biswajeet Guha, Tanay Gosavi +3 more | 2025-09-09 |
| 12334127 | Non-linear polar material based multi-capacitor high density bit-cell | Rajeev Kumar Dokania, Mustansir Yunus Mukadam, Erik Unterborn, Amrita Mathuriya, Debo Olaosebikan +3 more | 2025-06-17 |
| 12100473 | Computer memory arrays employing memory banks and integrated serializer/de-serializer circuits for supporting serialization/de-serialization of read/write data in burst read/write modes, and related methods | Stephen Edward Liles, Ashish A. Bait | 2024-09-24 |
| 12057159 | Memory system with burst mode having logic gates as sense elements | Stephen Edward Liles, Gregory Christopher Burda | 2024-08-06 |
| 11967394 | Memory arrays employing flying bit lines to increase effective bit line length for supporting higher performance, increased memory density, and related methods | Robert A. Sweitzer | 2024-04-23 |
| 11854423 | Refreshable braille display | Prithu Kolar | 2023-12-26 |
| 11733898 | Memory array for storing odd and even data bits of data words in alternate sub-banks to reduce multi-bit error rate and related methods | — | 2023-08-22 |
| 11699483 | Memory system with burst mode having logic gates as sense elements | Stephen Edward Liles, Gregory Christopher Burda | 2023-07-11 |
| 11587610 | Memory having flying bitlines for improved burst mode read operations | Stephen Edward Liles | 2023-02-21 |
| 11521514 | Refreshable braille display | Prithu Kolar | 2022-12-06 |
| 10902893 | Negative bitline write assist circuit and method for operating the same | John R. Riley, Gunjan H. Pandya | 2021-01-26 |
| 10818326 | Negative bitline write assist circuit and method for operating the same | John R. Riley, Gunjan H. Pandya | 2020-10-27 |
| 10002654 | Capacitive wordline boosting | Jaydeep P. Kulkarni, Ankit Sharma, Subho Chatterjee, Karthik Subramanian, Farhana Sheikh +1 more | 2018-06-19 |
| 9818460 | Negative bitline write assist circuit and method for operating the same | John R. Riley, Gunjan H. Pandya | 2017-11-14 |
| 9812189 | Read and write apparatus and method for a dual port memory | Wei-Hsiang Ma, Gunjan H. Pandya | 2017-11-07 |
| 9767890 | Operation aware auto-feedback SRAM | Eric A. Karl | 2017-09-19 |
| 9607687 | Dual-port static random access memory (SRAM) | Gunjan H. Pandya, Uddalak Bhattacharya, Zheng Guo | 2017-03-28 |
| 9378788 | Negative bitline write assist circuit and method for operating the same | John R. Riley, Gunjan H. Pandya | 2016-06-28 |
| 9208853 | Dual-port static random access memory (SRAM) | Gunjan H. Pandya, Uddalak Bhattacharya, Zheng Guo | 2015-12-08 |
| 8451670 | Adaptive and dynamic stability enhancement for memories | Fatih Hamzaoglu, Yih Wang, Eric A. Karl, Yong-Gee Ng, Uddalak Bhattacharya +2 more | 2013-05-28 |
| 7286389 | Low-power, p-channel enhancement-type metal-oxide semiconductor field-effect transistor (PMOSFET) SRAM cells | Hisham Z. Massoud | 2007-10-23 |
| 6989234 | Method and apparatus for non-contact electrostatic actuation of droplets | Richard B. Fair | 2006-01-24 |