Issued Patents All Time
Showing 26–50 of 88 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8405665 | Programmable graphics processor for multithreaded execution of programs | John Erik Lindholm, Stuart F. Oberman, Ming Y. Siu, Matthew P. Gerlach | 2013-03-26 |
| 8375176 | Lock mechanism to enable atomic updates to shared memory | John R. Nickolls, Lars Nyland, Peter C. Mills | 2013-02-12 |
| 8327123 | Maximized memory throughput on parallel processing devices | Norbert Juffa | 2012-12-04 |
| 8312254 | Indirect function call instructions in a synchronous parallel thread processor | John R. Nickolls, Lars Nyland, Peter C. Mills, John Erik Lindholm | 2012-11-13 |
| 8271763 | Unified addressing and instructions for accessing parallel memory spaces | John R. Nickolls, Ian A. Buck, Robert Steven Glanville | 2012-09-18 |
| 8253748 | Shader performance registers | Roger L. Allen | 2012-08-28 |
| 8237705 | Hierarchical processor array | John Erik Lindholm, John S. Montrym, Emmett M. Kilgariff, Simon Moy, Sean J. Treichler +2 more | 2012-08-07 |
| 8225076 | Scoreboard having size indicators for tracking sequential destination register usage in a multi-threaded processor | Peter C. Mills, Stuart F. Oberman, Ming Y. Siu | 2012-07-17 |
| 8176265 | Shared single-access memory with management of multiple parallel requests | Ming Y. Siu, Weizhong Xu, Stuart F. Oberman, John R. Nickolls, Peter C. Mills | 2012-05-08 |
| 8174531 | Programmable graphics processor for multithreaded execution of programs | John Erik Lindholm, Stuart F. Oberman, Ming Y. Siu, Matthew P. Gerlach | 2012-05-08 |
| 8159496 | Subdividing a shader program | John Erik Lindholm, Gary M. Tarolli | 2012-04-17 |
| 8117423 | Pipeline replay support for multicycle operations | Godfrey P. D'Souza, Paul Serris | 2012-02-14 |
| 8108625 | Shared memory with parallel access and access conflict resolution mechanism | Ming Y. Siu, Weizhong Xu, Stuart F. Oberman, John R. Nickolls, Peter C. Mills | 2012-01-31 |
| 8095829 | Soldier-on mode to control processor error handling behavior | Bryon S. Nordquist | 2012-01-10 |
| 8077174 | Hierarchical processor array | John Erik Lindholm, John S. Montrym, Emmett M. Kilgariff, Simon Moy, Sean J. Treichler +2 more | 2011-12-13 |
| 8074224 | Managing state information for a multi-threaded processor | Bryon S. Nordquist | 2011-12-06 |
| 8055856 | Lock mechanism to enable atomic updates to shared memory | John R. Nickolls, Lars Nyland, Peter C. Mills | 2011-11-08 |
| 7984277 | System and method of instruction modification | John Banning, Eric Hao | 2011-07-19 |
| 7949855 | Scheduler in multi-threaded processor prioritizing instructions passing qualification rule | Peter C. Mills, John Erik Lindholm, Gary M. Tarolli, John Burgess | 2011-05-24 |
| 7925860 | Maximized memory throughput using cooperative thread arrays | Norbert Juffa | 2011-04-12 |
| 7886135 | Pipeline replay support for unaligned memory operations | Godfrey P. D'Souza, Paul Serris | 2011-02-08 |
| 7877585 | Structured programming control flow in a SIMD architecture | John R. Nickolls, John Erik Lindholm, Svetoslav D. Tzvetkov | 2011-01-25 |
| 7864185 | Register based queuing for texture requests | John Erik Lindholm, John R. Nickolls, Simon Moy | 2011-01-04 |
| 7836276 | System and method for processing thread groups in a SIMD architecture | John Erik Lindholm | 2010-11-16 |
| 7834881 | Operand collector architecture | Samuel Liu, John Erik Lindholm, Ming Y. Siu, Stuart F. Oberman | 2010-11-16 |