Issued Patents All Time
Showing 1–17 of 17 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12320040 | Woven structure and method of manufacture | Christopher Jones, Adam J. BISHOP, Richard Wayne Hall, Sarvesh DHIMAN | 2025-06-03 |
| 12257763 | Woven structure, method and apparatus for a flanged composite component | Christopher Jones, Robert C. BACKHOUSE, Sarvesh DHIMAN | 2025-03-25 |
| 9542192 | Tokenized streams for concurrent execution between asymmetric multiprocessors | Nicholas Patrick Wilt, Philip Alexander Cuadra | 2017-01-10 |
| 9317290 | Expressing parallel execution relationships in a sequential programming language | Bastiaan Aarts | 2016-04-19 |
| 8539516 | System and method for enabling interoperability between application programming interfaces | Nicholas Patrick Wilt, Nolan David Goodnight | 2013-09-17 |
| 8402229 | System and method for enabling interoperability between application programming interfaces | Nicholas Patrick Wilt, Nolan David Goodnight | 2013-03-19 |
| 8347310 | System and method for representing and managing a multi-architecure co-processor application program | Julius Vanderspek, Nicholas Patrick Wilt, Jayant B. Kolhe, Bastiaan Aarts | 2013-01-01 |
| 8321849 | Virtual architecture and instruction set for parallel thread computing | John R. Nickolls, Henry Packard Moreton, Lars Nyland, Richard Craig Johnson, Robert Steven Glanville +1 more | 2012-11-27 |
| 8281294 | System and method for representing and managing a multi-architecture co-processor application program | Julius Vanderspek, Nicholas Patrick Wilt, Jayant B. Kolhe, Bastiaan Aarts | 2012-10-02 |
| 8276132 | System and method for representing and managing a multi-architecture co-processor application program | Julius Vanderspek, Nicholas Patrick Wilt, Jayant B. Kolhe, Bastiaan Aarts | 2012-09-25 |
| 8271763 | Unified addressing and instructions for accessing parallel memory spaces | John R. Nickolls, Brett W. Coon, Robert Steven Glanville | 2012-09-18 |
| 8261234 | System, method, and computer program product for compiling code adapted to execute utilizing a first processor, for executing the code utilizing a second processor | Bastiaan Aarts | 2012-09-04 |
| 7809928 | Generating event signals for performance register control using non-operative instructions | Roger L. Allen, Brett W. Coon, John R. Nickolls | 2010-10-05 |
| 7627723 | Atomic memory operators in a parallel processor | John R. Nickolls, Michael C. Shebanow, Lars Nyland | 2009-12-01 |
| 7567252 | Optimizing performance of a graphics processing unit for efficient execution of general matrix operations | David Steinkraus, Richard Szeliski | 2009-07-28 |
| 7548892 | Processing machine learning techniques using a graphics processing unit | Patrice Y. Simard, David Steinkraus | 2009-06-16 |
| 7219085 | System and method for accelerating and optimizing the processing of machine learning techniques using a graphics processing unit | Patrice Y. Simard, David Steinkraus | 2007-05-15 |