Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
JN

John R. Nickolls — 66 Patents

NVIDIA: 55 patents #58 of 7,811Top 1%
MCMaspar Computer: 6 patents #1 of 14Top 8%
Broadcom: 5 patents #2,119 of 9,346Top 25%
Los Altos, CA: #128 of 3,651 inventorsTop 4%
California: #4,970 of 386,348 inventorsTop 2%
Overall (All Time): #32,599 of 4,157,543Top 1%
66 Patents All Time
John R. Nickolls has been granted 66 US patents while listed as an inventor at NVIDIA. The first was granted in 1993 and the most recent in July 2019. John R. Nickolls ranks #32,599 of 4,157,543 US inventors in our database (top 0.78%). Patent records list John R. Nickolls in Los Altos, CA, US.

Patents per Year

Patents granted per year, 1993 to 2019Bar chart with a peak of 9 patents in 2012.peak 91993: 1 patents19931994: 1 patents1996: 3 patents19961997: 1 patents2005: 3 patents20052006: 1 patents2007: 1 patents20072008: 4 patents2009: 7 patents20092010: 7 patents2011: 6 patents20112012: 9 patents2013: 6 patents20132014: 5 patents2015: 1 patents20152016: 3 patents2017: 3 patents20172018: 2 patents2019: 2 patents2019

Issued Patents All Time

Showing 1–25 of 66 patents

Patent #TitleCo-InventorsDateApprox Value ⓘ
10365930 Instructions for managing a parallel cache hierarchy Brett W. Coon, Michael C. Shebanow 2019-07-30
10360039 Predicted instruction execution in parallel processors with reduced per-thread state information including choosing a minimum or maximum of two operands based on a predicate value Richard Craig Johnson, Robert Steven Glanville 2019-07-23 $362,683,000
10152328 Systems and methods for voting among parallel threads Lars Nyland, Peter C. Mills, Jeremy Sugerman, Timothy Foley, Brian Fahs +2 more 2018-12-11 $143,375,000
9952977 Cache operations and policies for a multi-threaded client Steven James Heinrich, Alexander L. Minkin, Brett W. Coon, Rajeshwaran Selvanesan, Robert Steven Glanville +4 more 2018-04-24 $155,137,000
9830197 Cooperative thread array reduction and scan operations Brian Fahs, Ming Y. Siu, Brett W. Coon, Lars Nyland 2017-11-28 $39,910,000
9639365 Indirect function call instructions in a synchronous parallel thread processor Brett W. Coon, Lars Nyland, Peter C. Mills, John Erik Lindholm 2017-05-02 $52,442,000
9639479 Instructions for managing a parallel cache hierarchy Brett W. Coon, Michael C. Shebanow 2017-05-02 $52,442,000
9519947 Architecture and instructions for accessing multi-dimensional formatted surface memory Brian Fahs, Lars Nyland, John Erik Lindholm, Richard Craig Johnson 2016-12-13 $185,713,000
9417875 Cooperative thread array reduction and scan operations Brian Fahs, Ming Y. Siu, Brett W. Coon, Lars Nyland 2016-08-16 $27,684,000
9286256 Sharing data crossbar for reads and writes in a data cache Alexander L. Minkin, Steven James Heinrich, Rajeshwaran Selvanesan, Stewart Glenn Carlton 2016-03-15 $18,824,000
9223578 Coalescing memory barrier operations across multiple parallel threads Steven James Heinrich, Brett W. Coon, Michael C. Shebanow 2015-12-29 $15,890,000
8751771 Efficient implementation of arrays of structures on SIMT and SIMD architectures Brian Fahs, Henry Packard Moreton, Brett W. Coon 2014-06-10 $6,679,000
8732713 Thread group scheduler for computing on a parallel thread processor Brett W. Coon, John Erik Lindholm, Robert J. Stoll, Nicholas Wang, Jack Choquette 2014-05-20 $3,876,000
8700877 Address mapping for a parallel thread processor Michael C. Shebanow, Yan Yan Tang 2014-04-15 $1,804,000
8677106 Unanimous branch instructions in a parallel thread processor Richard Craig Johnson, Robert Steven Glanville, Guillermo J. Rozas 2014-03-18 $10,058,000
8645638 Shared single-access memory with management of multiple parallel requests Brett W. Coon, Ming Y. Siu, Weizhong Xu, Stuart F. Oberman, Peter C. Mills 2014-02-04 $4,726,000
8615646 Unanimous branch instructions in a parallel thread processor Richard Craig Johnson, Robert Steven Glanville, Guillermo J. Rozas 2013-12-24 $9,652,000
8615541 Extended-precision integer arithmetic and logical instructions Richard Craig Johnson 2013-12-24 $9,652,000
8539204 Cooperative thread array reduction and scan operations Brian Fahs, Ming Y. Siu, Brett W. Coon, Lars Nyland 2013-09-17 $3,489,000
8522000 Trap handler architecture for a parallel processing unit Michael C. Shebanow, Jack Choquette, Brett W. Coon, Steven James Heinrich, Aravind Kalaiah +4 more 2013-08-27 $11,381,000
8392669 Systems and methods for coalescing memory accesses of parallel threads Lars Nyland, Gentaro Hirota, Tanmoy Mandal 2013-03-05 $8,122,000
8375176 Lock mechanism to enable atomic updates to shared memory Brett W. Coon, Lars Nyland, Peter C. Mills 2013-02-12 $6,282,000
8321849 Virtual architecture and instruction set for parallel thread computing Henry Packard Moreton, Lars Nyland, Ian A. Buck, Richard Craig Johnson, Robert Steven Glanville +1 more 2012-11-27 $4,836,000
8312254 Indirect function call instructions in a synchronous parallel thread processor Brett W. Coon, Lars Nyland, Peter C. Mills, John Erik Lindholm 2012-11-13 $16,728,000
8271763 Unified addressing and instructions for accessing parallel memory spaces Brett W. Coon, Ian A. Buck, Robert Steven Glanville 2012-09-18 $10,312,000