Issued Patents All Time
Showing 76–88 of 88 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6954847 | System and method for translating non-native instructions to native instructions for processing on a host processor | Yoshiyuki Miyayama, Le Trong Nguyen, Johannes Wang | 2005-10-11 |
| 6738892 | Use of enable bits to control execution of selected instructions | David Keppel | 2004-05-18 |
| 6728865 | Pipeline replay support for unaligned memory operations | Godfrey P. D'Souza, Paul Serris | 2004-04-27 |
| 6640297 | Link pipe system for storage and retrieval of sequences of branch addresses | John Banning, Eric Hao | 2003-10-28 |
| 6615300 | Fast look-up of indirect branch destination in a dynamic translation system | John Banning, Linus Torvalds, Brian Choy, Malcolm Wing, Patrick Gainer | 2003-09-02 |
| 6604188 | Pipeline replay support for multi-cycle operations wherein all VLIW instructions are flushed upon detection of a multi-cycle atom operation in a VLIW instruction | Godfrey P. D'Souza, Paul Serris | 2003-08-05 |
| 6356615 | Programmable event counter system | David Keppel, Charles R. Price | 2002-03-12 |
| 6263423 | System and method for translating non-native instructions to native instructions for processing on a host processor | Yoshiyuki Miyayama, Le Trong Nguyen, Johannes Wang | 2001-07-17 |
| 5987593 | System and method for handling load and/or store operations in a superscalar microprocessor | Cheryl D. Senter, Johannes Wang, Yoshiyuki Miyayama, Le Trong Nguyen | 1999-11-16 |
| 5983334 | Superscalar microprocessor for out-of-order and concurrently executing at least two RISC instructions translating from in-order CISC instructions | Yoshiyuki Miyayama, Le Trong Nguyen, Johannes Wang | 1999-11-09 |
| 5619666 | System for translating non-native instructions to native instructions and combining them into a final bucket for processing on a host processor | Yoshiyuki Miyayama, Le Trong Nguyen, Johannes Wang | 1997-04-08 |
| 5546552 | Method for translating non-native instructions to native instructions and combining them into a final bucket for processing on a host processor | Yoshiyuki Miyayama, Le Trong Nguyen, Johannes Wang | 1996-08-13 |
| 5438668 | System and method for extraction, alignment and decoding of CISC instructions into a nano-instruction bucket for execution by a RISC computer | Yoshiyuki Miyayama, Le Trong Nguyen, Johannes Wang | 1995-08-01 |