JW

Johannes Wang

SE Seiko Epson: 61 patents #122 of 7,774Top 2%
TR Transmeta: 4 patents #25 of 86Top 30%
PA Philips Electronics North America: 1 patents #328 of 725Top 50%
SG Seiko Group: 1 patents #32 of 90Top 40%
📍 Redwood City, CA: #61 of 5,061 inventorsTop 2%
🗺 California: #4,421 of 386,348 inventorsTop 2%
Overall (All Time): #29,553 of 4,157,543Top 1%
70
Patents All Time

Issued Patents All Time

Showing 1–25 of 70 patents

Patent #TitleCo-InventorsDate
8019975 System and method for handling load and/or store operations in a superscalar microprocessor Cheryl Senter Brashears, Le Trong Nguyen, Derek J. Lentz, Yoshiyuki Miyayama, Sanjiv Garg +4 more 2011-09-13
7958337 System and method for retiring approximately simultaneously a group of instructions in a superscalar microprocessor Sanjiv Garg, Trevor Deosaran 2011-06-07
7941635 High-performance superscalar-based computer system with out-of order instruction execution and concurrent results distribution Le Trong Nguyen, Derek J. Lentz, Yoshiyuki Miyayama, Sanjiv Garg, Yasuaki Hagiwara +3 more 2011-05-10
7934078 System and method for retiring approximately simultaneously a group of instructions in a superscalar microprocessor Sanjiv Garg, Trevor Deosaran 2011-04-26
7861069 System and method for handling load and/or store operations in a superscalar microprocessor Cheryl D. Senter 2010-12-28
7844797 System and method for handling load and/or store operations in a superscalar microprocessor Cheryl D. Senter 2010-11-30
7802074 Superscalar RISC instruction scheduling Sanjiv Garg, Kevin R. Iadonato, Le Trong Nguyen 2010-09-21
7739482 High-performance, superscalar-based computer system with out-of-order instruction execution Le Trong Nguyen, Derek J. Lentz, Yoshiyuki Miyayama, Sanjiv Garg, Yasuaki Hagiwara +3 more 2010-06-15
7721070 High-performance, superscalar-based computer system with out-of-order instruction execution Le Trong Nguyen, Derek J. Lentz, Yoshiyuki Miyayama, Sanjiv Garg, Yasuaki Hagiwara +3 more 2010-05-18
7664935 System and method for translating non-native instructions to native instructions for processing on a host processor Brett W. Coon, Yoshiyuki Miyayama, Le Trong Nguyen 2010-02-16
7555632 High-performance superscalar-based computer system with out-of-order instruction execution and concurrent results distribution Le Trong Nguyen, Derek J. Lentz, Yoshiyuki Miyayama, Sanjiv Garg, Yasuaki Hagiwara +3 more 2009-06-30
7523296 System and method for handling exceptions and branch mispredictions in a superscalar microprocessor Sanjiv Garg, Trevor Deosaran 2009-04-21
7516305 System and method for retiring approximately simultaneously a group of instructions in a superscalar microprocessor Sanjiv Garg, Trevor Deosaran 2009-04-07
7487333 High-performance, superscalar-based computer system with out-of-order instruction execution Le Trong Nguyen, Derek J. Lentz, Yoshiyuki Miyayama, Sanjiv Garg, Yasuaki Hagiwara +3 more 2009-02-03
7447876 System and method for handling load and/or store operations in a superscalar microprocessor Cheryl D. Senter 2008-11-04
7343473 System and method for translating non-native instructions to native instructions for processing on a host processor Brett W. Coon, Yoshiyuki Miyayama, Le Trong Nguyen 2008-03-11
7162610 High-performance, superscalar-based computer system with out-of-order instruction execution Le Trong Nguyen, Derek J. Lentz, Yoshiyuki Miyayama, Sanjiv Garg, Yasuaki Hagiwara +3 more 2007-01-09
7051187 Superscalar RISC instruction scheduling Sanjiv Garg, Kevin R. Iadonato, Le Trong Nguyen 2006-05-23
7028161 High-performance, superscalar-based computer system with out-of-order instruction execution and concurrent results distribution Le Trong Nguyen, Derek J. Lentz, Yoshiyuki Miyayama, Sanjiv Garg, Yasuaki Hagiwara +3 more 2006-04-11
7000097 System and method for handling load and/or store operations in a superscalar microprocessor Cheryl D. Senter 2006-02-14
6986024 High-performance, superscalar-based computer system with out-of-order instruction execution Le Trong Nguyen, Derek J. Lentz, Yoshiyuki Miyayama, Sanjiv Garg, Yasuaki Hagiwara +3 more 2006-01-10
6965987 System and method for handling load and/or store operations in a superscalar microprocessor Cheryl Senter Brashears, Le Trong Nguyen, Derek J. Lentz, Yoshiyuki Miyayama, Sanjiv Garg +4 more 2005-11-15
6959375 High-performance, superscalar-based computer system with out-of-order instruction execution Le Trong Nguyen, Derek J. Lentz, Yoshiyuki Miyayama, Sanjiv Garg, Yasuaki Hagiwara +3 more 2005-10-25
6957320 System and method for handling load and/or store operations in a superscalar microprocessor Cheryl D. Senter 2005-10-18
6954847 System and method for translating non-native instructions to native instructions for processing on a host processor Brett W. Coon, Yoshiyuki Miyayama, Le Trong Nguyen 2005-10-11