Issued Patents All Time
Showing 1–25 of 72 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8074052 | System and method for assigning tags to control instruction processing in a superscalar processor | Kevin R. Iadonato, Trevor Deosaran | 2011-12-06 |
| 8019975 | System and method for handling load and/or store operations in a superscalar microprocessor | Cheryl Senter Brashears, Johannes Wang, Le Trong Nguyen, Derek J. Lentz, Yoshiyuki Miyayama +4 more | 2011-09-13 |
| 7979678 | System and method for register renaming | Trevor Deosaran, Kevin R. Iadonato | 2011-07-12 |
| 7958337 | System and method for retiring approximately simultaneously a group of instructions in a superscalar microprocessor | Johannes Wang, Trevor Deosaran | 2011-06-07 |
| 7941636 | RISC microprocessor architecture implementing multiple typed register sets | Derek J. Lentz, Le Trong Nguyen, Sho Long Chen | 2011-05-10 |
| 7941635 | High-performance superscalar-based computer system with out-of order instruction execution and concurrent results distribution | Le Trong Nguyen, Derek J. Lentz, Yoshiyuki Miyayama, Yasuaki Hagiwara, Johannes Wang +3 more | 2011-05-10 |
| 7934078 | System and method for retiring approximately simultaneously a group of instructions in a superscalar microprocessor | Johannes Wang, Trevor Deosaran | 2011-04-26 |
| 7802074 | Superscalar RISC instruction scheduling | Kevin R. Iadonato, Le Trong Nguyen, Johannes Wang | 2010-09-21 |
| 7739482 | High-performance, superscalar-based computer system with out-of-order instruction execution | Le Trong Nguyen, Derek J. Lentz, Yoshiyuki Miyayama, Yasuaki Hagiwara, Johannes Wang +3 more | 2010-06-15 |
| 7721070 | High-performance, superscalar-based computer system with out-of-order instruction execution | Le Trong Nguyen, Derek J. Lentz, Yoshiyuki Miyayama, Yasuaki Hagiwara, Johannes Wang +3 more | 2010-05-18 |
| 7685402 | RISC microprocessor architecture implementing multiple typed register sets | Derek J. Lentz, Le Trong Nguyen, Sho Long Chen | 2010-03-23 |
| 7558945 | System and method for register renaming | Trevor Deosaran, Kevin R. Iadonato | 2009-07-07 |
| 7555631 | RISC microprocessor architecture implementing multiple typed register sets | Derek J. Lentz, Le Trong Nguyen, Sho Long Chen | 2009-06-30 |
| 7555632 | High-performance superscalar-based computer system with out-of-order instruction execution and concurrent results distribution | Le Trong Nguyen, Derek J. Lentz, Yoshiyuki Miyayama, Yasuaki Hagiwara, Johannes Wang +3 more | 2009-06-30 |
| 7523296 | System and method for handling exceptions and branch mispredictions in a superscalar microprocessor | Johannes Wang, Trevor Deosaran | 2009-04-21 |
| 7516305 | System and method for retiring approximately simultaneously a group of instructions in a superscalar microprocessor | Johannes Wang, Trevor Deosaran | 2009-04-07 |
| 7487333 | High-performance, superscalar-based computer system with out-of-order instruction execution | Le Trong Nguyen, Derek J. Lentz, Yoshiyuki Miyayama, Yasuaki Hagiwara, Johannes Wang +3 more | 2009-02-03 |
| 7430651 | System and method for assigning tags to control instruction processing in a superscalar processor | Kevin R. Iadonato, Trevor Deosaran | 2008-09-30 |
| 7162610 | High-performance, superscalar-based computer system with out-of-order instruction execution | Le Trong Nguyen, Derek J. Lentz, Yoshiyuki Miyayama, Yasuaki Hagiwara, Johannes Wang +3 more | 2007-01-09 |
| 7051187 | Superscalar RISC instruction scheduling | Kevin R. Iadonato, Le Trong Nguyen, Johannes Wang | 2006-05-23 |
| 7043624 | System and method for assigning tags to control instruction processing in a superscalar processor | Kevin R. Iadonato, Trevor Deosaran | 2006-05-09 |
| 7028161 | High-performance, superscalar-based computer system with out-of-order instruction execution and concurrent results distribution | Le Trong Nguyen, Derek J. Lentz, Yoshiyuki Miyayama, Yasuaki Hagiwara, Johannes Wang +3 more | 2006-04-11 |
| 6986024 | High-performance, superscalar-based computer system with out-of-order instruction execution | Le Trong Nguyen, Derek J. Lentz, Yoshiyuki Miyayama, Yasuaki Hagiwara, Johannes Wang +3 more | 2006-01-10 |
| 6970995 | System and method for register renaming | Trevor Deosaran, Kevin R. Iadonato | 2005-11-29 |
| 6965987 | System and method for handling load and/or store operations in a superscalar microprocessor | Cheryl Senter Brashears, Johannes Wang, Le Trong Nguyen, Derek J. Lentz, Yoshiyuki Miyayama +4 more | 2005-11-15 |