Issued Patents All Time
Showing 26–50 of 70 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6948052 | High-performance, superscalar-based computer system with out-of-order instruction execution | Le Trong Nguyen, Derek J. Lentz, Yoshiyuki Miyayama, Sanjiv Garg, Yasuaki Hagiwara +3 more | 2005-09-20 |
| 6941447 | High-performance, superscalar-based computer system with out-of-order instruction execution | Le Trong Nguyen, Derek J. Lentz, Yoshiyuki Miyayama, Sanjiv Garg, Yasuaki Hagiwara +3 more | 2005-09-06 |
| 6934829 | High-performance, superscalar-based computer system with out-of-order instruction execution | Le Trong Nguyen, Derek J. Lentz, Yoshiyuki Miyayama, Sanjiv Garg, Yasuaki Hagiwara +3 more | 2005-08-23 |
| 6920548 | System and method for retiring approximately simultaneously a group of instructions in a superscalar microprocessor | Sanjiv Garg, Trevor Deosaran | 2005-07-19 |
| 6915412 | High-performance, superscalar-based computer system with out-of-order instruction execution | Le Trong Nguyen, Derek J. Lentz, Yoshiyuki Miyayama, Sanjiv Garg, Yasuaki Hagiwara +3 more | 2005-07-05 |
| 6775761 | System and method for retiring approximately simultaneously a group of instructions in a superscalar microprocessor | Sanjiv Garg, Trevor Deosaran | 2004-08-10 |
| 6735685 | System and method for handling load and/or store operations in a superscalar microprocessor | Cheryl D. Senter | 2004-05-11 |
| 6647485 | High-performance, superscalar-based computer system with out-of-order instruction execution | Le Trong Nguyen, Derek J. Lentz, Yoshiyuki Miyayama, Sanjiv Garg, Yasuaki Hagiwara +3 more | 2003-11-11 |
| 6434693 | System and method for handling load and/or store operations in a superscalar microprocessor | Cheryl D. Senter | 2002-08-13 |
| 6412064 | System and method for retiring approximately simultaneously a group of instructions in a superscalar microprocessor | Sanjiv Garg, Trevor Deosaran | 2002-06-25 |
| 6289433 | Superscalar RISC instruction scheduling | Sanjiv Garg, Kevin R. Iadonato, Le Trong Nguyen | 2001-09-11 |
| 6282630 | High-performance, superscalar-based computer system with out-of-order instruction execution and concurrent results distribution | Le Trong Nguyen, Derek J. Lentz, Yoshiyuki Miyayama, Sanjiv Garg, Yasuaki Hagiwara +3 more | 2001-08-28 |
| 6272619 | High-performance, superscalar-based computer system with out-of-order instruction execution | Le Trong Nguyen, Derek J. Lentz, Yoshiyuki Miyayama, Sanjiv Garg, Yasuaki Hagiwara +3 more | 2001-08-07 |
| 6263423 | System and method for translating non-native instructions to native instructions for processing on a host processor | Brett W. Coon, Yoshiyuki Miyayama, Le Trong Nguyen | 2001-07-17 |
| 6256720 | High performance, superscalar-based computer system with out-of-order instruction execution | Le Trong Nguyen, Derek J. Lentz, Yoshiyuki Miyayama, Sanjiv Garg, Yasuaki Hagiwara +3 more | 2001-07-03 |
| 6230254 | System and method for handling load and/or store operators in a superscalar microprocessor | Cheryl D. Senter | 2001-05-08 |
| 6131157 | System and method for retiring approximately simultaneously a group of instructions in a superscalar microprocessor | Sanjiv Garg, Trevor Dcosaran | 2000-10-10 |
| 6128723 | High-performance, superscalar-based computer system with out-of-order instruction execution | Le Trong Nguyen, Derek J. Lentz, Yoshiyuki Miyayama, Sanjiv Garg, Yasuaki Hagiwara +3 more | 2000-10-03 |
| 6101594 | High-performance, superscalar-based computer system with out-of-order instruction execution | Le Trong Nguyen, Derek J. Lentz, Yoshiyuki Miyayama, Sanjiv Garg, Yasuaki Hagiwara +3 more | 2000-08-08 |
| 6092181 | High-performance, superscalar-based computer system with out-of-order instruction execution | Le Trong Nguyen, Derek J. Lentz, Yoshiyuki Miyayama, Sanjiv Garg, Yasuaki Hagiwara +3 more | 2000-07-18 |
| 6038654 | High performance, superscalar-based computer system with out-of-order instruction execution | Le Trong Nguyen, Derek J. Lentz, Yoshiyuki Miyayama, Sanjiv Garg, Yasuaki Hagiwara +3 more | 2000-03-14 |
| 6038653 | High-performance superscalar-based computer system with out-of-order instruction execution and concurrent results distribution | Le Trong Nguyen, Derek J. Lentz, Yoshiyuki Miyayama, Sanjiv Garg, Yasuaki Hagiwara +3 more | 2000-03-14 |
| 5987593 | System and method for handling load and/or store operations in a superscalar microprocessor | Cheryl D. Senter, Brett W. Coon, Yoshiyuki Miyayama, Le Trong Nguyen | 1999-11-16 |
| 5983334 | Superscalar microprocessor for out-of-order and concurrently executing at least two RISC instructions translating from in-order CISC instructions | Brett W. Coon, Yoshiyuki Miyayama, Le Trong Nguyen | 1999-11-09 |
| 5974526 | Superscalar RISC instruction scheduling | Sanjiv Garg, Kevin R. Iadonato, Le Trong Nguyen | 1999-10-26 |