Issued Patents All Time
Showing 1–21 of 21 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10355996 | Heterogeneous channel capacities in an interconnect | Sailesh Kumar, Joji Philip, Eric Norige | 2019-07-16 |
| 9774498 | Hierarchical asymmetric mesh with virtual routers | Sailesh Kumar, Eric Norige, Joji Philip, Mahmud-Ul Hassan, Joseph B. Rowlands | 2017-09-26 |
| 9253085 | Hierarchical asymmetric mesh with virtual routers | Sailesh Kumar, Eric Norige, Joji Philip, Mahmud-Ul Hassan, Joseph B. Rowlands | 2016-02-02 |
| 9244880 | Automatic construction of deadlock free interconnects | Joji Philip, Sailesh Kumar, Eric Norige, Mahmud-Ul Hassan | 2016-01-26 |
| 9185026 | Tagging and synchronization for fairness in NOC interconnects | Sailesh Kumar, Eric Norige, Joji Philip, Mahmud-Ul Hassan, Joseph B. Rowlands | 2015-11-10 |
| 9130856 | Creating multiple NoC layers for isolation or avoiding NoC traffic congestion | Sailesh Kumar, Eric Norige, Joji Philip, Mahmud-Ul Hassan, Joseph B. Rowlands | 2015-09-08 |
| 9009648 | Automatic deadlock detection and avoidance in a system interconnect by capturing internal dependencies of IP cores using high level specification | Sailesh Kumar, Eric Norige, Joji Philip, Mahmud-Ul Hassan, Joseph B. Rowlands | 2015-04-14 |
| 9007920 | QoS in heterogeneous NoC by assigning weights to NoC node channels and using weighted arbitration at NoC nodes | Sailesh Kumar, Eric Norige, Joji Philip, Mahmud-Ul Hassan, Joseph B. Rowlands | 2015-04-14 |
| 8885510 | Heterogeneous channel capacities in an interconnect | Sailesh Kumar, Joji Philip, Eric Norige, Mahmud-Ul Hassan | 2014-11-11 |
| 8819616 | Asymmetric mesh NoC topologies | Joji Philip, Sailesh Kumar, Eric Norige, Mahmud-Ul Hassan | 2014-08-26 |
| 8819611 | Asymmetric mesh NoC topologies | Joji Philip, Sailesh Kumar, Eric Norige, Mahmud-Ul Hassan | 2014-08-26 |
| 8601423 | Asymmetric mesh NoC topologies | Joji Philip, Sailesh Kumar, Eric Norige, Mahmud-Ul Hassan | 2013-12-03 |
| 6157237 | Reduced skew control block clock distribution network | — | 2000-12-05 |
| 6081022 | Clock distribution network with efficient shielding | Aleksandar Pance | 2000-06-27 |
| 5994765 | Clock distribution network with efficient shielding | Aleksandar Pance | 1999-11-30 |
| 5880607 | Clock distribution network with modular buffers | — | 1999-03-09 |
| 5850150 | Final stage clock buffer in a clock distribution network | Prasad Chalasani, Marc E. Levitt | 1998-12-15 |
| 5668490 | Flip-flop with full scan capability | David Greenhill, Philip Ferolito | 1997-09-16 |
| 5481697 | An apparatus for providing a clock signal for a microprocessor at a selectable one of a plurality of frequencies and for dynamically switching between any of said plurality of frequencies | Gregory S. Mathews, Edward Zager | 1996-01-02 |
| 5274678 | Clock switching apparatus and method for computer systems | Philip Ferolito | 1993-12-28 |
| 5221867 | Programmable logic array with internally generated precharge and evaluation timing | Brad Heaney | 1993-06-22 |