Sailesh Kumar — 95 Patents at Netspeed Systems

Sailesh Kumar has been granted 95 US patents while listed as an inventor at Netspeed Systems. The first was granted in 2011 and the most recent in April 2025. Sailesh Kumar ranks #16,077 of 4,157,543 US inventors in our database (top 0.39%). Patent records list Sailesh Kumar in San Jose, CA, US.

Issued Patents All Time

Showing 1–25 of 95 patents

Patent #	Title	Co-Inventors	Date	Approx Value ⓘ
12277060	Application mapping on hardened network-on-chip (NoC) of field-programmable gate array (FPGA)	—	2025-04-15
12111783	Flexible on-die fabric interface	Swadesh Choudhary, Robert G. Blankenship, Siva Prasad Gadey, Vinit Mathew Abraham, Yen-Cheng Liu	2024-10-08	$19,971,000
11698879	Flexible on-die fabric interface	Swadesh Choudhary, Robert G. Blankenship, Siva Prasad Gadey, Vinit Mathew Abraham, Yen-Cheng Liu	2023-07-11	$21,736,000
11176302	System on chip (SoC) builder	Nishant Rao, Pier Giorgio Raponi	2021-11-16
11023377	Application mapping on hardened network-on-chip (NoC) of field-programmable gate array (FPGA)	—	2021-06-01
10896476	Repository of integration description of hardware intellectual property for NoC construction and SoC integration	Nishant Rao, Pier Giorgio Raponi	2021-01-19
10749811	Interface virtualization and fast path for Network on Chip	Joseph B. Rowlands, Joji Philip, Nishant Rao	2020-08-18
10735335	Interface virtualization and fast path for network on chip	Joseph B. Rowlands, Joji Philip, Nishant Rao	2020-08-04
10613616	Systems and methods for facilitating low power on a network-on-chip	James Bauman, Joe Rowlands	2020-04-07
10564704	Systems and methods for facilitating low power on a network-on-chip	James Bauman, Joe Rowlands	2020-02-18
10564703	Systems and methods for facilitating low power on a network-on-chip	James Bauman, Joe Rowlands	2020-02-18
10554496	Heterogeneous SoC IP core placement in an interconnect to optimize latency and interconnect performance	Eric Norige	2020-02-04
10547514	Automatic crossbar generation and router connections for network-on-chip (NOC) topology generation	Nishant Rao, Pier Giorgio Raponi	2020-01-28
10528682	Automatic performance characterization of a network-on-chip (NOC) interconnect	Eric Norige, Pier Giorgio Raponi	2020-01-07
10523599	Buffer sizing of a NoC through machine learning	Eric Norige, Nishant Rao	2019-12-31
10496770	System level simulation in Network on Chip architecture	Amit Patankar, Eric Norige	2019-12-03
10472581	Process and apparatus for hydrocracking and hydroisomerizing a hydrocarbon stream	Andrew J. Towarnicky, Vasant P. Thakkar, Massimo Sangalli, John A. Petri	2019-11-12
10469337	Cost management against requirements for the generation of a NoC	William John Bainbridge, Eric Norige, Nishant Rao	2019-11-05
10469338	Cost management against requirements for the generation of a NoC	William John Bainbridge, Eric Norige, Nishant Rao	2019-11-05
10452124	Systems and methods for facilitating low power on a network-on-chip	James Bauman, Joe Rowlands	2019-10-22
10419300	Cost management against requirements for the generation of a NoC	William John Bainbridge, Eric Norige, Nishant Rao	2019-09-17
10355996	Heterogeneous channel capacities in an interconnect	Joji Philip, Eric Norige, Sundari Mitra	2019-07-16
10348563	System-on-chip (SoC) optimization through transformation and generation of a network-on-chip (NoC) topology	Nishant Rao, Pier Giorgio Raponi	2019-07-09
10324509	Automatic generation of power management sequence in a SoC or NoC	Anup Gangwar, Vishnu Mohan Pusuluri, Poonacha Kongetira	2019-06-18
10298485	Systems and methods for NoC construction	Pier Giorgio Raponi, Nishant Rao	2019-05-21

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Sailesh Kumar — 95 Patents

Issued Patents All Time

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