Marc E. Levitt — 16 Patents at Oracle

Marc E. Levitt has been granted 16 US patents while listed as an inventor at Oracle. The first was granted in 1994 and the most recent in October 2013. Marc E. Levitt ranks #284,196 of 4,157,543 US inventors in our database (top 6.8%). Patent records list Marc E. Levitt in Sunnyvale, CA, US.

Issued Patents All Time

Showing 1–16 of 16 patents

Patent #	Title	Co-Inventors	Date	Approx Value ⓘ
8549339	Processor core communication in multi-core processor	Andrew Wolfe	2013-10-01
6081913	Method for ensuring mutual exclusivity of selected signals during application of test patterns	Sridhar Narayanan	2000-06-27	$167,833,000
5900757	Clock stopping schemes for data buffer	Sandeep Aggarwal, Srinivas Nori	1999-05-04	$37,282,000
5898702	Mutual exclusivity circuit for use in test pattern application scan architecture circuits	Sridhar Narayanan	1999-04-27	$38,089,000
5892778	Boundary-scan circuit for use with linearized impedance control type output drivers	Farideh Golshan	1999-04-06	$28,349,000
5872796	Method for interfacing boundary-scan circuitry with linearized impedance control type output drivers	Farideh Golshan	1999-02-16	$42,785,000
5870408	Method and apparatus for on die testing	Sandeep Aggarwal, David Bertucci	1999-02-09	$39,133,000
5864564	Control circuit for deterministic stopping of an integrated circuit internal clock	Harsimran S. Grewal	1999-01-26	$63,647,000
5850150	Final stage clock buffer in a clock distribution network	Sundari Mitra, Prasad Chalasani	1998-12-15	$39,424,000
5787012	Integrated circuit with identification signal writing circuitry distributed on multiple metal layers	—	1998-07-28	$24,757,000
5774474	Pipelined scan enable for fast scan testing	Sridhar Narayanan	1998-06-30	$20,206,000
5570376	Method and apparatus for identifying faults within a system	Ramachandra P. Kunda, Adam Malamy	1996-10-29	$69,667,000
5528165	Logic signal validity verification apparatus	Slobodan Simovich, Srinivas Nori, Ramachandra P. Kunda	1996-06-18	$37,098,000
5513186	Method and apparatus for interconnect testing without speed degradation	—	1996-04-30	$28,512,000
5379303	Maximizing improvement to fault coverage of system logic of an integrated circuit with embedded memory arrays	—	1995-01-03	$17,431,000
5341382	Method and apparatus for improving fault coverage of system logic of an integrated circuit with embedded memory arrays	—	1994-08-23	$24,353,000

Marc E. Levitt — 16 Patents

Issued Patents All Time

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