Issued Patents All Time
Showing 1–25 of 53 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10582617 | Method of fabricating a circuit module | Jian Yin, Loyde M. Carpenter, Jr., Nattorn Pongratananukul, Patrick J. Selby, Steven R. Rivet +1 more | 2020-03-03 |
| 9723766 | Power supply module with electromagnetic-interference (EMI) shielding, cooling, or both shielding and cooling, along two or more sides | Jian Yin, Michael Althar | 2017-08-01 |
| 9717146 | Circuit module such as a high-density lead frame array (HDA) power module, and method of making same | Jian Yin, Loyde M. Carpenter, Jr., Nattorn Pongratananukul, Patrick J. Selby, Steven R. Rivet +1 more | 2017-07-25 |
| 9613889 | Packaged circuit with a lead frame and laminate substrate | Jian Yin, Loyde M. Carpenter, Jr. | 2017-04-04 |
| 9607917 | Stacked inductor-electronic package assembly and technique for manufacturing same | Zaki Moussaoui | 2017-03-28 |
| 9012267 | Method of manufacturing a packaged circuit including a lead frame and a laminate substrate | Jian Yin, Loyde M. Carpenter, Jr. | 2015-04-21 |
| 8951847 | Package leadframe for dual side assembly | Kai Liu | 2015-02-10 |
| 8946875 | Packaged semiconductor devices including pre-molded lead-frame structures, and related methods and systems | Lynn K. Wiese, Viraj A. Patwardhan | 2015-02-03 |
| 8635762 | Methods for manufacturing a radio frequency identification tag without aligning the chip and antenna | Sadanand R. Patil, Cheol Han | 2014-01-28 |
| 8558396 | Bond pad configurations for semiconductor dies | Sagar Pushpala, Seshasayee S. Ankireddi | 2013-10-15 |
| 8508052 | Stacked power converter structure and method | David B. Bell, Francois Hebert | 2013-08-13 |
| 8445998 | Leadframe structures for semiconductor packages | Young Gon Kim, Louis Elliott Pflughaupt | 2013-05-21 |
| 8324602 | Optical sensors that reduce specular reflections | Lynn K. Wiese, Viraj A. Patwardhan | 2012-12-04 |
| 8232541 | Optical sensors that reduce specular reflections | Lynn K. Wiese, Viraj A. Patwardhan | 2012-07-31 |
| 8206836 | Tie-bar configuration for leadframe type carrier strips | Loyde M. Carpenter, Jr., Randolph Cruz | 2012-06-26 |
| 7923300 | Stacked power converter structure and method | David B. Bell, Francois Hebert | 2011-04-12 |
| 7714415 | Leadframe structures for semiconductor packages | Young Gon Kim, Louis Elliott Pflughaupt | 2010-05-11 |
| 7674702 | Solder bump formation in electronics packaging | Viraj A. Patwardhan | 2010-03-09 |
| 7642175 | Semiconductor devices having a back surface protective coating | Viraj A. Patwardhan, Lian Hee Tan | 2010-01-05 |
| 7510908 | Method to dispense light blocking material for wafer level CSP | Hau Nguyen | 2009-03-31 |
| 7420280 | Reduced stress under bump metallization structure | — | 2008-09-02 |
| 7375431 | Solder bump formation in electronics packaging | Viraj A. Patwardhan | 2008-05-20 |
| 7282375 | Wafer level package design that facilitates trimming and testing | — | 2007-10-16 |
| 7241643 | Wafer level chip scale package | Hem Takiar | 2007-07-10 |
| 7230580 | Design of a two interconnect IC chip for a radio frequency identification tag and method for manufacturing same | Sadanand R. Patil, Cheol Han | 2007-06-12 |