Issued Patents All Time
Showing 51–53 of 53 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6075290 | Surface mount die: wafer level chip-scale package and process for making the same | William Jeffrey Schaefer, Pai-Hsiang Kao | 2000-06-13 |
| 6023094 | Semiconductor wafer having a bottom surface protective coating | Pai-Hsiang Kao, William Jeffrey Schaefer | 2000-02-08 |
| 6001723 | Application of wire bond loop as integrated circuit package component interconnect | Jaime A. Bayan | 1999-12-14 |