Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
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Jason Panavich — 10 Patents

Microsoft: 7 patents #6,431 of 40,388Top 20%
Qualcomm: 2 patents #5,657 of 12,104Top 50%
Intel: 1 patents #18,326 of 30,777Top 60%
Raleigh, NC: #841 of 6,378 inventorsTop 15%
North Carolina: #5,314 of 45,564 inventorsTop 15%
Overall (All Time): #481,000 of 4,157,543Top 15%
10 Patents All Time
Jason Panavich has been granted 10 US patents while listed as an inventor at Microsoft. The first was granted in 2005 and the most recent in October 2025. Jason Panavich ranks #481,000 of 4,157,543 US inventors in our database (top 11.6%). Patent records list Jason Panavich in Raleigh, NC, US.

Patents per Year

Patents granted per year, 2005 to 2025Bar chart with a peak of 3 patents in 2021.peak 32005: 1 patents20052013: 1 patents20132014: 1 patents20142021: 3 patents20212022: 2 patents20222025: 2 patents2025

Issued Patents All Time

Showing 1–10 of 10 patents

Patent #TitleCo-InventorsDateApprox Value ⓘ
12436890 Snoop filter with disaggregated vector table Eric F. Robinson 2025-10-07
12386753 Systems and methods for managing dirty data Kevin N. Magill, Eric F. Robinson, Michael B. Mitchell, Michael P. Wilson 2025-08-12
11372757 Tracking repeated reads to guide dynamic selection of cache coherence protocols in processor-based devices Kevin N. Magill, Eric F. Robinson, Derek T. Bachand, Michael B. Mitchell, Michael P. Wilson 2022-06-28 $238,915,000
11354239 Maintaining domain coherence states including domain state no-owned (DSN) in processor-based devices Eric F. Robinson, Kevin N. Magill, Derek T. Bachand, Michael B. Mitchell, Michael P. Wilson 2022-06-07 $255,877,000
11138114 Providing dynamic selection of cache coherence protocols in processor-based devices Kevin N. Magill, Eric F. Robinson, Derek T. Bachand, Michael P. Wilson, Michael B. Mitchell 2021-10-05 $188,794,000
11093396 Enabling atomic memory accesses across coherence granule boundaries in processor-based devices Eric F. Robinson, Derek T. Bachand, Kevin N. Magill, Michael B. Mitchell, Michael P. Wilson 2021-08-17 $196,769,000
10896135 Facilitating page table entry (PTE) maintenance in processor-based devices Eric F. Robinson, Thomas Philip Speier 2021-01-19 $251,618,000
8782356 Auto-ordering of strongly ordered, device, and exclusive transactions across multiple memory regions James Norris Dieffenderfer, Thomas Andrew Sartorius, Thomas Philip Speier 2014-07-15 $5,442,000
8499208 Method and apparatus for scheduling BIST routines James Norris Dieffenderfer, Anand Krishnamurthy, Clint Wayne Mumford, Ketan Vitthal Patel, Ravi Rajagopalan +1 more 2013-07-30 $10,271,000
6931498 Status register architecture for flexible read-while-write device Sanjay S. Talreja, Ramkarthik Ganesan, Terry L. Kendall 2005-08-16 $26,624,000