Issued Patents All Time
Showing 1–9 of 9 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12386753 | Systems and methods for managing dirty data | Kevin N. Magill, Eric F. Robinson, Michael B. Mitchell, Michael P. Wilson | 2025-08-12 |
| 11372757 | Tracking repeated reads to guide dynamic selection of cache coherence protocols in processor-based devices | Kevin N. Magill, Eric F. Robinson, Derek T. Bachand, Michael B. Mitchell, Michael P. Wilson | 2022-06-28 |
| 11354239 | Maintaining domain coherence states including domain state no-owned (DSN) in processor-based devices | Eric F. Robinson, Kevin N. Magill, Derek T. Bachand, Michael B. Mitchell, Michael P. Wilson | 2022-06-07 |
| 11138114 | Providing dynamic selection of cache coherence protocols in processor-based devices | Kevin N. Magill, Eric F. Robinson, Derek T. Bachand, Michael P. Wilson, Michael B. Mitchell | 2021-10-05 |
| 11093396 | Enabling atomic memory accesses across coherence granule boundaries in processor-based devices | Eric F. Robinson, Derek T. Bachand, Kevin N. Magill, Michael B. Mitchell, Michael P. Wilson | 2021-08-17 |
| 10896135 | Facilitating page table entry (PTE) maintenance in processor-based devices | Eric F. Robinson, Thomas Philip Speier | 2021-01-19 |
| 8782356 | Auto-ordering of strongly ordered, device, and exclusive transactions across multiple memory regions | James Norris Dieffenderfer, Thomas Andrew Sartorius, Thomas Philip Speier | 2014-07-15 |
| 8499208 | Method and apparatus for scheduling BIST routines | James Norris Dieffenderfer, Anand Krishnamurthy, Clint Wayne Mumford, Ketan Vitthal Patel, Ravi Rajagopalan +1 more | 2013-07-30 |
| 6931498 | Status register architecture for flexible read-while-write device | Sanjay S. Talreja, Ramkarthik Ganesan, Terry L. Kendall | 2005-08-16 |