Issued Patents All Time
Showing 1,001–1,025 of 1,397 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6642620 | Integrated circuits having low resistivity contacts and the formation thereof using an in situ plasma doping and clean | Sujit Sharan | 2003-11-04 |
| 6635939 | Boron incorporated diffusion barrier material | Vishnu K. Agarwal | 2003-10-21 |
| 6632736 | Method of forming low-resistance contact to silicon having a titanium silicide interface and an amorphous titanium carbonitride barrier layer | Trung T. Doan, Tyler Lowrey | 2003-10-14 |
| 6633084 | Semiconductor wafer for improved chemical-mechanical polishing over large area features | Chris C. Yu | 2003-10-14 |
| 6630391 | Boron incorporated diffusion barrier material | Vishnu K. Agarwal | 2003-10-07 |
| 6627465 | System and method for detecting flow in a mass flow controller | Sujit Sharan, Neal R. Rueger, Allen Mardian | 2003-09-30 |
| 6627492 | Methods of forming polished material and methods of forming isolation regions | Shubneesh Batra | 2003-09-30 |
| 6627260 | Deposition methods | Garo Derderian | 2003-09-30 |
| 6624085 | Semiconductor structure, capacitor, mask and methods of manufacture thereof | — | 2003-09-23 |
| 6624517 | Low-resistance contact to silicon having a titanium silicide interface and an amorphous titanium carbonitride barrier layer | Trung T. Doan, Tyler Lowrey | 2003-09-23 |
| 6620253 | Engagement mechanism for semiconductor substrate deposition process kit hardware | Ross S. Dando, Craig M. Carpenter, Philip Campbell, Allen Mardian | 2003-09-16 |
| 6617250 | Methods of depositing a layer comprising tungsten and methods of forming a transistor gate line | Cem Basceri, Garo Derderian, Mark Visokay, John M. Drynan | 2003-09-09 |
| 6617206 | Method of forming a capacitor structure | Guy T. Blalock | 2003-09-09 |
| 6617230 | Use of selective ozone teos oxide to create variable thickness layers and spacers | William Budge, Christopher W. Hill | 2003-09-09 |
| 6617246 | Semiconductor processing methods and integrated circuitry | Ravi Iyer | 2003-09-09 |
| 6613702 | Methods of forming capacitor constructions | Trung T. Doan | 2003-09-02 |
| 6613587 | Method of replacing at least a portion of a semiconductor substrate deposition chamber liner | Craig M. Carpenter, Ross S. Dando, Philip Campbell, Allen Mardian | 2003-09-02 |
| 6614072 | High coupling split-gate transistor | Sukesh Sandhu | 2003-09-02 |
| 6606802 | Cleaning efficiency improvement in a high density plasma process chamber using thermally hot gas | Michael Li, Neal R. Rueger | 2003-08-19 |
| 6608343 | Rough (high surface area) electrode from Ti and TiN, capacitors and semiconductor devices including same | Garo Derderian | 2003-08-19 |
| 6607946 | Process for growing a dielectric layer on a silicon-containing surface using a mixture of N2O and O3 | Randhir P. S. Thakur | 2003-08-19 |
| 6602785 | Method of forming a conductive contact on a substrate and method of processing a semiconductor substrate using an ozone treatment | Sujit Sharan, Terry L. Gilton | 2003-08-05 |
| 6602807 | Use of linear injectors to deposit uniform selective ozone TEOS oxide film by pulsing reactants on and off | William Budge, Christopher W. Hill | 2003-08-05 |
| 6602796 | Chemical vapor deposition for smooth metal films | Garo Derderian | 2003-08-05 |
| 6596583 | Methods for forming and integrated circuit structures containing ruthenium and tungsten containing layers | Vishnu K. Agarwal, Garo Derderian, Weimin Li, Mark Visokay, Cem Basceri +1 more | 2003-07-22 |