Issued Patents All Time
Showing 101–125 of 338 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8369145 | Apparatus and method for detecting over-programming condition in multistate memory device | Robert Norman | 2013-02-05 |
| 8363443 | Circuits and techniques to compensate data signals for variations of parameters affecting memory cells in cross-point arrays | Seow Fong Lim, Chang Hua Siau | 2013-01-29 |
| 8351264 | High voltage switching circuitry for a cross-point array | Chang Hua Siau | 2013-01-08 |
| 8305796 | Access signal adjustment circuits and methods for memory cells in a cross-point array | Chang Hua Siau | 2012-11-06 |
| 8270193 | Local bit lines and methods of selecting the same to access memory elements in cross-point arrays | Chang Hua Siau, Darrell Rinerson, Seow Fong Lim, Sri Rama Namala | 2012-09-18 |
| 8271014 | Automated parameter adjustment to compensate self adjusting transmit power and sensitivity level at the node B | Aziz Gholmieh, Farhad Meshkati, Mehmet Yavuz, Siddharth Mohan | 2012-09-18 |
| 8208287 | Contemporaneous margin verification and memory access for memory cells in cross-point memory arrays | Chang Hua Siau | 2012-06-26 |
| 8139409 | Access signal adjustment circuits and methods for memory cells in a cross-point array | Chang Hua Siau | 2012-03-20 |
| 8130549 | Apparatus and method for detecting over-programming condition in multistate memory device | Robert Norman | 2012-03-06 |
| 8120945 | Preservation circuit and methods to maintain values representing data in one or more layers of memory | Robert Norman | 2012-02-21 |
| 8089542 | CMOS imager with integrated circuitry | — | 2012-01-03 |
| 8062942 | Method for fabricating multi-resistive state memory devices | Darrell Rinerson, Wayne Kinney, Edmond R. Ward, Steve Kuo-Ren Hsia, Steven W. Longcor +2 more | 2011-11-22 |
| 8031545 | Low read current architecture for memory | Darrell Rinerson, Chang Hua Siau | 2011-10-04 |
| 7995371 | Threshold device for a memory array | Darrell Rinerson, Julie Casperson Brewer, Wayne Kinney, Roy Lambertson, Lawrence Schloss | 2011-08-09 |
| 7985963 | Memory using variable tunnel barrier widths | Darrell Rinerson, Wayne Kinney, Edmond R. Ward | 2011-07-26 |
| 7978501 | Method for contemporaneous margin verification and memory access for memory cells in cross-point memory arrays | Chang Hua Siau | 2011-07-12 |
| 7952631 | CMOS imager with integrated circuitry | — | 2011-05-31 |
| 7898841 | Preservation circuit and methods to maintain values representing data in one or more layers of memory | Robert Norman | 2011-03-01 |
| 7889539 | Multi-resistive state memory device with conductive oxide electrodes | Darrell Rinerson, Wayne Kinney, Edmond R. Ward, Steve Kuo-Ren Hsia, Steven W. Longcor +2 more | 2011-02-15 |
| 7884349 | Selection device for re-writable memory | Darrell Rinerson, Steve Kuo-Ren Hsia, Steven W. Longcor, Wayne Kinney, Edmond R. Ward | 2011-02-08 |
| 7847330 | Four vertically stacked memory layers in a non-volatile re-writeable memory device | Darrell Rinerson, Steve Kuo-Ren Hsia | 2010-12-07 |
| 7830701 | Contemporaneous margin verification and memory access for memory cells in cross point memory arrays | Chang Hua Siau | 2010-11-09 |
| 7719876 | Preservation circuit and methods to maintain values representing data in one or more layers of memory | Robert Norman | 2010-05-18 |
| 7701834 | Movable terminal in a two terminal memory array | Darrell Rinerson, John Sanchez, Lawerence Schloss | 2010-04-20 |
| 7701791 | Low read current architecture for memory | Darrell Rinerson, Chang Hua Siau | 2010-04-20 |