Issued Patents All Time
Showing 1–14 of 14 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12007860 | Salvaging bad blocks in a memory device | Lu Tong, Kristopher Kopel, Sheng-Huang Lee, Chang Hua Siau | 2024-06-11 |
| 11776655 | Memory device virtual blocks using half good blocks | Jung Sheng Hoei, Jianmin Huang, Ashutosh Malshe, Xiangang Luo | 2023-10-03 |
| 11537484 | Salvaging bad blocks in a memory device | Lu Tong, Kristopher Kopel, Sheng-Huang Lee, Chang Hua Siau | 2022-12-27 |
| 11475974 | Memory device virtual blocks using half good blocks | Jung Sheng Hoei, Jianmin Huang, Ashutosh Malshe, Xiangang Luo | 2022-10-18 |
| 11398256 | Local bit lines and methods of selecting the same to access memory elements in cross-point arrays | Chang Hua Siau, Christophe J. Chevallier, Darrell Rinerson, Seow Fong Lim | 2022-07-26 |
| 10622028 | Local bit lines and methods of selecting the same to access memory elements in cross-point arrays | Chang Hua Siau, Christophe J. Chevallier, Darrell Rinerson, Seow Fong Lim | 2020-04-14 |
| 10552284 | System and method for controlling PCIe direct attached nonvolatile memory storage subsystems | Krishanth Skandakumaran, Arun Kumar Medapati, Ashwin Narasimha, Ajith Kumar B | 2020-02-04 |
| 10387239 | Detecting memory failures in the runtime environment | Sateesh Kondapalli | 2019-08-20 |
| 10002646 | Local bit lines and methods of selecting the same to access memory elements in cross-point arrays | Chang Hua Siau, Christophe J. Chevallier, Darrell Rinerson, Seow Fong Lim | 2018-06-19 |
| 9940036 | System and method for controlling various aspects of PCIe direct attached nonvolatile memory storage subsystems | Krishanth Skandakumaran, Arun Kumar Medapati, Ashwin Narasimha, Ajith Kumar B | 2018-04-10 |
| 9612763 | Apparatus and methods to control power on PCIe direct attached nonvolatile memory storage subsystems | Krishanth Skandakumaran, Arun Kumar Medapati, Ashwin Narasimha, Ajith Kumar B | 2017-04-04 |
| 8897050 | Local bit lines and methods of selecting the same to access memory elements in cross-point arrays | Chang Hua Siau, Christophe J. Chevallier, Darrell Rinerson, Seow Fong Lim | 2014-11-25 |
| 8638584 | Memory architectures and techniques to enhance throughput for cross-point arrays | Christophe J. Chevallier, Chang Hua Siau, David Eggleston | 2014-01-28 |
| 8270193 | Local bit lines and methods of selecting the same to access memory elements in cross-point arrays | Chang Hua Siau, Christophe J. Chevallier, Darrell Rinerson, Seow Fong Lim | 2012-09-18 |