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Edmond R. Ward — 43 Patents

USUnity Semiconductor: 35 patents #7 of 55Top 15%

HLHefei Reliance Memory Limited: 7 patents #7 of 28Top 25%

Monte Sereno, CA: #19 of 229 inventorsTop 9%

California: #10,282 of 386,348 inventorsTop 3%

Overall (All Time): #69,380 of 4,157,543Top 2%

43 Patents All Time

Edmond R. Ward has been granted 43 US patents while listed as an inventor at Unity Semiconductor. The first was granted in 2004 and the most recent in June 2023. Edmond R. Ward ranks #69,380 of 4,157,543 US inventors in our database (top 1.7%). Patent records list Edmond R. Ward in Monte Sereno, CA, US.

Patents per Year

Issued Patents All Time

Showing 1–25 of 43 patents

Patent #	Title	Co-Inventors	Date
11672189	Two-terminal reversibly switchable memory device	Darrell Rinerson, Christophe J. Chevallier, Wayne Kinney, Roy Lambertson, John Sanchez +2 more	2023-06-06
11502249	Memory element with a reactive metal layer	Christophe J. Chevallier, Steve Kuo-Ren Hsia, Wayne Kinney, Steven W. Longcor, Darrell Rinerson +2 more	2022-11-15
11063214	Two-terminal reversibly switchable memory device	Darrell Rinerson, Christophe J. Chevallier, Wayne Kinney, Roy Lambertson, John Sanchez +2 more	2021-07-13
10833125	Memory element with a reactive metal layer	Christophe J. Chevallier, Steve Kuo-Ren Hsia, Wayne Kinney, Steven W. Longcor, Darrell Rinerson +2 more	2020-11-10
10680171	Two-terminal reversibly switchable memory device	Darrell Rinerson, Christophe J. Chevallier, Wayne Kinney, Roy Lambertson, John Sanchez +2 more	2020-06-09
10340312	Memory element with a reactive metal layer	Christophe J. Chevallier, Steve Kuo-Ren Hsia, Wayne Kinney, Steven W. Longcor, Darrell Rinerson +2 more	2019-07-02
10224480	Two-terminal reversibly switchable memory device	Darrell Rinerson, Christophe J. Chevallier, Wayne Kinney, Roy Lambertson, John Sanchez +2 more	2019-03-05
9831425	Two-terminal reversibly switchable memory device	Darrell Rinerson, Christophe J. Chevallier, Wayne Kinney, Roy Lambertson, John Sanchez +2 more	2017-11-28
9806130	Memory element with a reactive metal layer	Christophe J. Chevallier, Steve Kuo-Ren Hsia, Wayne Kinney, Steven W. Longcor, Darrell Rinerson +2 more	2017-10-31
9570515	Memory element with a reactive metal layer	Christophe J. Chevallier, Steve Kuo-Ren Hsia, Wayne Kinney, Steven W. Longcor, Darrell Rinerson +2 more	2017-02-14
9159408	Memory element with a reactive metal layer	Christophe J. Chevallier, Steve Kuo-Ren Hsia, Wayne Kinney, Steven W. Longcor, Darrell Rinerson +2 more	2015-10-13
9159913	Two-terminal reversibly switchable memory device	Darrell Rinerson, Christophe J. Chevallier, Wayne Kinney, Roy Lambertson, John Sanchez +2 more	2015-10-13
8675389	Memory element with a reactive metal layer	Christophe J. Chevallier, Steve Kuo-Ren Hsia, Wayne Kinney, Steven W. Longcor, Darrell Rinerson +2 more	2014-03-18
8611130	Method for fabricating multi-resistive state memory devices	Darrell Rinerson, Christophe J. Chevallier, Steve Kuo-Ren Hsia, Wayne Kinney, Steven W. Longcor +2 more	2013-12-17
8062942	Method for fabricating multi-resistive state memory devices	Darrell Rinerson, Wayne Kinney, Steve Kuo-Ren Hsia, Steven W. Longcor, Christophe J. Chevallier +2 more	2011-11-22
7985963	Memory using variable tunnel barrier widths	Darrell Rinerson, Christophe J. Chevallier, Wayne Kinney	2011-07-26
7889539	Multi-resistive state memory device with conductive oxide electrodes	Darrell Rinerson, Wayne Kinney, Steve Kuo-Ren Hsia, Steven W. Longcor, Christophe J. Chevallier +2 more	2011-02-15
7884349	Selection device for re-writable memory	Darrell Rinerson, Steve Kuo-Ren Hsia, Steven W. Longcor, Wayne Kinney, Christophe J. Chevallier	2011-02-08
7633790	Multi-resistive state memory device with conductive oxide electrodes	Darrel Rinerson, Wayne Kinney, Steve Kuo-Ren Hsia, Steven W. Longcor, Christophe J. Chevallier +2 more	2009-12-15
7538338	Memory using variable tunnel barrier widths	Darrell Rinerson, Christophe J. Chevallier, Wayne Kinney	2009-05-26
7394679	Multi-resistive state element with reactive metal	Darrell Rinerson, Wayne Kinney, Steve Kuo-Ren Hsia, Steven W. Longcor, Christophe J. Chevallier +2 more	2008-07-01
7330370	Enhanced functionality in a two-terminal memory array	Darrell Rinerson, Christophe J. Chevallier, Steven W. Longcor, Robert Norman	2008-02-12
7326979	Resistive memory device with a treated interface	Darrell Rinerson, Wayne Kinney, John Sanchez, Steven W. Longcor, Steve Kuo-Ren Hsia +1 more	2008-02-05
7180772	High-density NVRAM	Darrell Rinerson, Steven W. Longcor, Wayne Kinney	2007-02-20
7095643	Re-writable memory with multiple memory layers	Darrell Rinerson, Christophe J. Chevallier, Wayne Kinney, Steven W. Longcor	2006-08-22