Issued Patents All Time
Showing 51–75 of 338 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9779788 | Sub-threshold enabled flash memory system | Daniel Martin Cermak, Scott Hanson | 2017-10-03 |
| 9767899 | Access signal conditioning for memory cells in an array | Chang Hua Siau | 2017-09-19 |
| 9748223 | Six-transistor SRAM semiconductor structures and methods of fabrication | Harry Luan, Bruce L. Bateman, Valery Axelrad, Charlie Cheng | 2017-08-29 |
| 9711212 | High voltage switching circuitry for a cross-point array | Chang Hua Siau | 2017-07-18 |
| 9613968 | Cross-coupled thyristor SRAM semiconductor structures and methods of fabrication | Harry Luan, Bruce L. Bateman, Valery Axelrad, Charlie Cheng | 2017-04-04 |
| 9570165 | 1D-2R memory architecture | Deepak C. Sekar, Gary B. Bronner, Lidia Vereen, Philip Swab, Elizabeth Friend +1 more | 2017-02-14 |
| 9570515 | Memory element with a reactive metal layer | Steve Kuo-Ren Hsia, Wayne Kinney, Steven W. Longcor, Darrell Rinerson, John Sanchez +2 more | 2017-02-14 |
| 9564441 | Two-transistor SRAM semiconductor structure and methods of fabrication | Harry Luan, Bruce L. Bateman, Valery Axelrad, Charlie Cheng | 2017-02-07 |
| 9564198 | Six-transistor SRAM semiconductor structures and methods of fabrication | Harry Luan, Bruce L. Bateman, Valery Axelrad, Charlie Cheng | 2017-02-07 |
| 9536607 | Preservation circuit and methods to maintain values representing data in one or more layers of memory | Robert Norman | 2017-01-03 |
| 9514811 | Access signal adjustment circuits and methods for memory cells in a cross-point array | Chang Hua Siau | 2016-12-06 |
| 9496020 | Six-transistor thyristor SRAM circuits and methods of operation | Harry Luan, Bruce L. Bateman, Valery Axelrad, Charlie Cheng | 2016-11-15 |
| 9460771 | Two-transistor thyristor SRAM circuit and methods of operation | Harry Luan, Bruce L. Bateman, Valery Axelrad, Charlie Cheng | 2016-10-04 |
| 9456336 | Femtocell message delivery and network planning | Rajat Prakash | 2016-09-27 |
| 9456423 | Automated parameter adjustment to compensate self adjusting transmit power and sensitivity level at the node B | Aziz Gholmieh, Farhad Meshkati, Mehmet Yavuz, Siddharth Mohan | 2016-09-27 |
| 9451480 | Methods and apparatus for power management in a wireless communication system | Yichao Huang, Chirag Sureshbhai Patel, Tamer Kadous, Mehmet Yavuz, Lili Zhang +9 more | 2016-09-20 |
| 9451466 | Base station employing shared resources among antenna units | Nachiappan Valliappan, Andrei Dragos Radulescu, Cong Shen | 2016-09-20 |
| 9449669 | Cross-coupled thyristor SRAM circuits and methods of operation | Harry Luan, Bruce L. Bateman, Valery Axelrad, Charlie Cheng | 2016-09-20 |
| 9384806 | Circuits and techniques to compensate memory access signals for variations of parameters in multiple layers of memory | Seow Fong Lim, Chang Hua Siau | 2016-07-05 |
| 9386441 | Femtocell message delivery and network planning | Rajat Prakash | 2016-07-05 |
| 9368200 | Low read current architecture for memory | Bruce L. Bateman, Darrell Rinerson, Chang Hua Siau | 2016-06-14 |
| 9357507 | Centralized management for pilot pollution mitigation in small cell networks | Sumeeth Nagaraja, Pooyan AMINI, Yeliz Tokgoz, Farhad Meshkati, Mehmet Yavuz | 2016-05-31 |
| 9306549 | High voltage switching circuitry for a cross-point array | Chang Hua Siau | 2016-04-05 |
| 9299427 | Access signal adjustment circuits and methods for memory cells in a cross-point array | Chang Hua Siau | 2016-03-29 |
| 9294978 | Method and apparatus for facilitating a beacon-assisted handover to a home node-B for users on an active call | Sumeeth Nagaraja, Mehmet Yavuz, Farhad Meshkati, Andrei Dragos Radulescu | 2016-03-22 |