Issued Patents All Time
Showing 1–25 of 32 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11282840 | High density vertical thyristor memory cell array with improved isolation | Harry Luan | 2022-03-22 |
| 11114438 | Thyristor volatile random access memory and methods of manufacture | Harry Luan, Bruce L. Bateman, Charlie Cheng | 2021-09-07 |
| 10553588 | Thyristor volatile random access memory and methods of manufacture | Harry Luan, Bruce L. Bateman, Charlie Cheng | 2020-02-04 |
| 10535657 | High density vertical thyristor memory cell array with improved isolation | Harry Luan | 2020-01-14 |
| 10529718 | Thyristor volatile random access memory and methods of manufacture | Harry Luan, Bruce L. Bateman, Charlie Cheng | 2020-01-07 |
| 10460789 | Methods of reading and writing data in a thyristor random access memory | Harry Luan, Bruce L. Bateman, Charlie Cheng | 2019-10-29 |
| 10438952 | Method of writing into and refreshing a thyristor volatile random access memory | Harry Luan, Bruce L. Bateman, Charlie Cheng | 2019-10-08 |
| 10381063 | Methods of reading and writing data in a thyristor random access memory | Harry Luan, Bruce L. Bateman, Charlie Cheng | 2019-08-13 |
| 10332886 | Thyristor volatile random access memory and methods of manufacture | Harry Luan, Bruce L. Bateman, Charlie Cheng | 2019-06-25 |
| 10283185 | Write assist thyristor-based SRAM circuits and methods of operation | Harry Luan, Bruce L. Bateman, Charlie Cheng, Christophe J. Chevallier | 2019-05-07 |
| 10256241 | Vertical thyristor memory with minority carrier lifetime reduction | Harry Luan, Charlie Cheng | 2019-04-09 |
| 10090037 | Methods of retaining and refreshing data in a thyristor random access memory | Harry Luan, Bruce L. Bateman, Charlie Cheng | 2018-10-02 |
| 10056389 | Cross-coupled thyristor SRAM semiconductor structures and methods of fabrication | Harry Luan, Bruce L. Bateman, Charlie Cheng, Christophe J. Chevallier | 2018-08-21 |
| 10020043 | Methods of reading and writing data in a thyristor random access memory | Harry Luan, Bruce L. Bateman, Charlie Cheng | 2018-07-10 |
| 10020308 | Thyristor memory cell with assist device | Harry Luan, Bruce L. Bateman, Charlie Cheng | 2018-07-10 |
| 9899389 | Two-transistor SRAM semiconductor structure and methods of fabrication | Harry Luan, Bruce L. Bateman, Charlie Cheng, Christophe J. Chevallier | 2018-02-20 |
| 9899390 | Methods and systems for reducing electrical disturb effects between thyristor memory cells using heterostructured cathodes | Harry Luan, Charlie Cheng | 2018-02-20 |
| 9837418 | Thyristor volatile random access memory and methods of manufacture | Harry Luan, Bruce L. Bateman, Charlie Cheng | 2017-12-05 |
| 9812454 | Methods and systems for reducing electrical disturb effects between thyristor memory cells using buried metal cathode lines | Harry Luan, Charlie Cheng | 2017-11-07 |
| 9748223 | Six-transistor SRAM semiconductor structures and methods of fabrication | Harry Luan, Bruce L. Bateman, Charlie Cheng, Christophe J. Chevallier | 2017-08-29 |
| 9741413 | Methods of reading six-transistor cross-coupled thyristor-based SRAM memory cells | Harry Luan, Bruce L. Bateman, Charlie Cheng | 2017-08-22 |
| 9613968 | Cross-coupled thyristor SRAM semiconductor structures and methods of fabrication | Harry Luan, Bruce L. Bateman, Charlie Cheng, Christophe J. Chevallier | 2017-04-04 |
| 9564441 | Two-transistor SRAM semiconductor structure and methods of fabrication | Harry Luan, Bruce L. Bateman, Charlie Cheng, Christophe J. Chevallier | 2017-02-07 |
| 9564199 | Methods of reading and writing data in a thyristor random access memory | Harry Luan, Bruce L. Bateman, Charlie Cheng | 2017-02-07 |
| 9564198 | Six-transistor SRAM semiconductor structures and methods of fabrication | Harry Luan, Bruce L. Bateman, Charlie Cheng, Christophe J. Chevallier | 2017-02-07 |