Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
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Bruce L. Bateman — 67 Patents

USUnity Semiconductor: 23 patents #9 of 55Top 20%
KTKilopass Technology: 17 patents #4 of 29Top 15%
TLTc Lab: 13 patents #2 of 8Top 25%
MEMicrounity Systems Engineering: 5 patents #6 of 31Top 20%
RARambus: 3 patents #270 of 549Top 50%
HLHefei Reliance Memory Limited: 2 patents #22 of 28Top 80%
Cypress Semiconductor: 1 patents #1,072 of 1,852Top 60%
TST-Ram Semiconductor: 1 patents #16 of 26Top 65%
OSOsram Sylvania: 1 patents #499 of 820Top 65%
TRTram: 1 patents #14 of 33Top 45%
Fremont, CA: #151 of 9,298 inventorsTop 2%
California: #4,843 of 386,348 inventorsTop 2%
Overall (All Time): #31,718 of 4,157,543Top 1%
67 Patents All Time
Bruce L. Bateman has been granted 67 US patents while listed as an inventor at Unity Semiconductor. The first was granted in 1987 and the most recent in December 2023. Bruce L. Bateman ranks #31,718 of 4,157,543 US inventors in our database (top 0.76%). Patent records list Bruce L. Bateman in Fremont, CA, US.

Issued Patents All Time

Showing 1–25 of 67 patents

Patent #TitleCo-InventorsDateApprox Value ⓘ
11849593 Vertical cross-point arrays for ultra-high-density memory applications 2023-12-19
11763872 3D memory array clusters and resulting memory architecture 2023-09-19
11367751 Vertical cross-point arrays for ultra-high-density memory applications 2022-06-21
11133049 3D memory array clusters and resulting memory architecture 2021-09-28
11114438 Thyristor volatile random access memory and methods of manufacture Harry Luan, Valery Axelrad, Charlie Cheng 2021-09-07
11087841 Global bit line pre-charge circuit that compensates for process, operating voltage, and temperature variations Chang Hua Siau 2021-08-10
10790334 Vertical cross-point arrays for ultra-high-density memory applications 2020-09-29
10658037 Reduced current memory device Deepak C. Sekar, Brent Haukness 2020-05-19 $2,398,000
10566056 Global bit line pre-charge circuit that compensates for process, operating voltage, and temperature variations Chang Hua Siau 2020-02-18
10553588 Thyristor volatile random access memory and methods of manufacture Harry Luan, Valery Axelrad, Charlie Cheng 2020-02-04
10553269 High-speed data transfer periods for thyristor memory cell arrays 2020-02-04
10529718 Thyristor volatile random access memory and methods of manufacture Harry Luan, Valery Axelrad, Charlie Cheng 2020-01-07
10529778 Vertical cross-point memory arrays Lidia Vereen, David Eggleston, Louis C. Parrillo 2020-01-07
10460789 Methods of reading and writing data in a thyristor random access memory Harry Luan, Valery Axelrad, Charlie Cheng 2019-10-29
10453526 Distributed cascode current source for RRAM set current limitation 2019-10-22
10438952 Method of writing into and refreshing a thyristor volatile random access memory Harry Luan, Valery Axelrad, Charlie Cheng 2019-10-08
10381063 Methods of reading and writing data in a thyristor random access memory Harry Luan, Valery Axelrad, Charlie Cheng 2019-08-13
10332886 Thyristor volatile random access memory and methods of manufacture Harry Luan, Valery Axelrad, Charlie Cheng 2019-06-25
10283185 Write assist thyristor-based SRAM circuits and methods of operation Harry Luan, Valery Axelrad, Charlie Cheng, Christophe J. Chevallier 2019-05-07
10229739 Global bit line pre-charge circuit that compensates for process, operating voltage, and temperature variations Chang Hua Siau 2019-03-12
10224100 Reduced current memory device Deepak C. Sekar, Brent Haukness 2019-03-05 $1,250,000
10096360 Distributed cascode current source for RRAM set current limitation 2018-10-09
10090037 Methods of retaining and refreshing data in a thyristor random access memory Harry Luan, Valery Axelrad, Charlie Cheng 2018-10-02
10056389 Cross-coupled thyristor SRAM semiconductor structures and methods of fabrication Harry Luan, Valery Axelrad, Charlie Cheng, Christophe J. Chevallier 2018-08-21
10050086 Vertical cross-point memory arrays Lidia Vereen, David Eggleston, Louis C. Parrillo 2018-08-14