Issued Patents All Time
Showing 25 most recent of 67 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11849593 | Vertical cross-point arrays for ultra-high-density memory applications | — | 2023-12-19 |
| 11763872 | 3D memory array clusters and resulting memory architecture | — | 2023-09-19 |
| 11367751 | Vertical cross-point arrays for ultra-high-density memory applications | — | 2022-06-21 |
| 11133049 | 3D memory array clusters and resulting memory architecture | — | 2021-09-28 |
| 11114438 | Thyristor volatile random access memory and methods of manufacture | Harry Luan, Valery Axelrad, Charlie Cheng | 2021-09-07 |
| 11087841 | Global bit line pre-charge circuit that compensates for process, operating voltage, and temperature variations | Chang Hua Siau | 2021-08-10 |
| 10790334 | Vertical cross-point arrays for ultra-high-density memory applications | — | 2020-09-29 |
| 10658037 | Reduced current memory device | Deepak C. Sekar, Brent Haukness | 2020-05-19 |
| 10566056 | Global bit line pre-charge circuit that compensates for process, operating voltage, and temperature variations | Chang Hua Siau | 2020-02-18 |
| 10553588 | Thyristor volatile random access memory and methods of manufacture | Harry Luan, Valery Axelrad, Charlie Cheng | 2020-02-04 |
| 10553269 | High-speed data transfer periods for thyristor memory cell arrays | — | 2020-02-04 |
| 10529718 | Thyristor volatile random access memory and methods of manufacture | Harry Luan, Valery Axelrad, Charlie Cheng | 2020-01-07 |
| 10529778 | Vertical cross-point memory arrays | Lidia Vereen, David Eggleston, Louis C. Parrillo | 2020-01-07 |
| 10460789 | Methods of reading and writing data in a thyristor random access memory | Harry Luan, Valery Axelrad, Charlie Cheng | 2019-10-29 |
| 10453526 | Distributed cascode current source for RRAM set current limitation | — | 2019-10-22 |
| 10438952 | Method of writing into and refreshing a thyristor volatile random access memory | Harry Luan, Valery Axelrad, Charlie Cheng | 2019-10-08 |
| 10381063 | Methods of reading and writing data in a thyristor random access memory | Harry Luan, Valery Axelrad, Charlie Cheng | 2019-08-13 |
| 10332886 | Thyristor volatile random access memory and methods of manufacture | Harry Luan, Valery Axelrad, Charlie Cheng | 2019-06-25 |
| 10283185 | Write assist thyristor-based SRAM circuits and methods of operation | Harry Luan, Valery Axelrad, Charlie Cheng, Christophe J. Chevallier | 2019-05-07 |
| 10229739 | Global bit line pre-charge circuit that compensates for process, operating voltage, and temperature variations | Chang Hua Siau | 2019-03-12 |
| 10224100 | Reduced current memory device | Deepak C. Sekar, Brent Haukness | 2019-03-05 |
| 10096360 | Distributed cascode current source for RRAM set current limitation | — | 2018-10-09 |
| 10090037 | Methods of retaining and refreshing data in a thyristor random access memory | Harry Luan, Valery Axelrad, Charlie Cheng | 2018-10-02 |
| 10056389 | Cross-coupled thyristor SRAM semiconductor structures and methods of fabrication | Harry Luan, Valery Axelrad, Charlie Cheng, Christophe J. Chevallier | 2018-08-21 |
| 10050086 | Vertical cross-point memory arrays | Lidia Vereen, David Eggleston, Louis C. Parrillo | 2018-08-14 |