Issued Patents All Time
Showing 51–75 of 130 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6548872 | Integrated circuitry comprising multiple transistors with different channel lengths | — | 2003-04-15 |
| 6509626 | Conductive device components of different base widths formed from a common conductive layer | — | 2003-01-21 |
| 6495395 | Electrical and thermal contact for use in semiconductor devices | — | 2002-12-17 |
| 6492656 | Reduced mask chalcogenide memory | Russell C. Zahorik | 2002-12-10 |
| 6492243 | Methods of forming capacitors and resultant capacitor structures | — | 2002-12-10 |
| 6483171 | Vertical sub-micron CMOS transistors on (110), (111), (311), (511), and higher order surfaces of bulk, SOI and thin film structures and method of forming same | Leonard Forbes, Wendell P. Noble | 2002-11-19 |
| 6479379 | Self-aligned etch stop for polycrystalline silicon plugs on a semiconductor device | — | 2002-11-12 |
| 6461967 | Material removal method for forming a structure | Zhiqiang Wu, Li Li, Thomas A. Figura, Kunal R. Parekh, Pai-Hung Pan +1 more | 2002-10-08 |
| 6459138 | Capacitor structures | — | 2002-10-01 |
| 6456535 | Dynamic flash memory cells with ultra thin tunnel oxides | Leonard Forbes, Luan C. Tran, Joseph E. Geusic, Kie Y. Ahn, Paul A. Farrar +2 more | 2002-09-24 |
| 6444572 | Semiconductor processing methods of forming a contact opening | Zhiqiang Wu, Manny K. F. Ma | 2002-09-03 |
| 6432793 | Oxidative conditioning method for metal oxide layer and applications thereof | — | 2002-08-13 |
| 6429125 | Microelectronic device fabricating method | — | 2002-08-06 |
| 6414376 | Method and apparatus for reducing isolation stress in integrated circuits | Randhir P. S. Thakur, Kevin G. Donohoe, Zhiqiang Wu | 2002-07-02 |
| 6403493 | Microelectronic device fabricating methods | — | 2002-06-11 |
| 6404669 | Reduced leakage DRAM storage unit | Zhigiang Wu, Randhir P. S. Thakur, Kirk D. Prall | 2002-06-11 |
| 6403442 | Methods of forming capacitors and resultant capacitor structures | — | 2002-06-11 |
| 6356500 | Reduced power DRAM device and method | Eugene H. Cloud, Kie Y. Ahn, Leonard Forbes, Paul A. Farrar, Kevin G. Donohoe +3 more | 2002-03-12 |
| 6355551 | Integrated circuit having a void between adjacent conductive lines | — | 2002-03-12 |
| 6348125 | Removal of copper oxides from integrated interconnects | Joseph E. Geusic | 2002-02-19 |
| 6319639 | Method for making a photomask with multiple absorption levels | — | 2001-11-20 |
| 6316784 | Method of making chalcogenide memory device | Russell C. Zahorik | 2001-11-13 |
| 6312988 | Methods of forming capacitors, methods of forming capacitor-over-bit line memory circuitry, and related integrated circuitry constructions | Tyler Lowrey, Luan C. Tran, D. Mark Durcan | 2001-11-06 |
| 6309975 | Methods of making implanted structures | Zhiqiang Wu, Li Li, Thomas A. Figura, Kunal R. Parekh, Pai-Hung Pan +1 more | 2001-10-30 |
| 6303956 | Conductive container structures having a dielectric cap | Gurtej S. Sandhu | 2001-10-16 |