Issued Patents All Time
Showing 76–100 of 130 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6300199 | Method of defining at least two different field effect transistor channel lengths using differently angled sidewall segments of a channel defining layer | — | 2001-10-09 |
| 6297129 | Methods of forming integrated circuitry, and methods of forming dynamic random access memory circuitry | Luan C. Tran | 2001-10-02 |
| 6287958 | Method of manufacturing a self-aligned etch stop for polycrystalline silicon plugs on a semiconductor device | — | 2001-09-11 |
| 6284643 | Electrical and thermal contact for use in semiconductor devices | — | 2001-09-04 |
| 6277704 | Microelectronic device fabricating method, method of forming a pair of conductive device components of different base widths from a common deposited conductive layer | — | 2001-08-21 |
| 6274482 | Semiconductor processing methods of forming a contact opening | Zhiqiang Wu, Manny K. F. Ma | 2001-08-14 |
| 6265281 | Method for forming dielectric within a recess | — | 2001-07-24 |
| 6261964 | Material removal method for forming a structure | Zhiqiang Wu, Li Li, Thomas A. Figura, Kunal R. Parekh, Pai-Hung Pan +1 more | 2001-07-17 |
| 6258664 | Methods of forming silicon-comprising materials having roughened outer surfaces, and methods of forming capacitor constructions | — | 2001-07-10 |
| 6255693 | Ion implantation with programmable energy, angle, and beam current | Kirk D. Prall | 2001-07-03 |
| 6252244 | Memory cell having a reduced active area and a memory array incorporating the same | — | 2001-06-26 |
| 6249460 | Dynamic flash memory cells with ultrathin tunnel oxides | Leonard Forbes, Luan C. Tran, Joseph E. Geusic, Kie Y. Ahn, Paul A. Farrar +2 more | 2001-06-19 |
| 6245615 | Method and apparatus on (110) surfaces of silicon structures with conduction in the <110> direction | Wendell P. Noble, Leonard Forbes | 2001-06-12 |
| 6232229 | Microelectronic device fabricating method, integrated circuit, and intermediate construction | — | 2001-05-15 |
| 6229148 | Ion implantation with programmable energy, angle, and beam current | Kirk D. Prall | 2001-05-08 |
| 6225142 | Memory cell having a reduced active area and a memory array incorporating the same | — | 2001-05-01 |
| 6221542 | Method for patterning a substrate using a photomask with multiple absorption levels | — | 2001-04-24 |
| 6189582 | Small electrode for a chalcogenide switching device and method for fabricating same | Russell C. Zahorik | 2001-02-20 |
| 6181594 | Reduced leakage DRAM storage unit | Zhiqiang Wu, Randhir P. S. Thakur, Kirk D. Prall | 2001-01-30 |
| 6157566 | Reduced leakage DRAM storage unit | Zhiqiang Wu, Randhir P. S. Thakur, Kirk D. Prall | 2000-12-05 |
| 6157565 | Reduced leakage DRAM storage unit | Zhiqiang Wu, Randhir P. S. Thakur, Kirk D. Prall | 2000-12-05 |
| 6150226 | Semiconductor processing methods, methods of forming capacitors, methods of forming silicon nitride, and methods of densifying silicon nitride layers | — | 2000-11-21 |
| 6141248 | DRAM and SRAM memory cells with repressed memory | Leonard Forbes | 2000-10-31 |
| 6141238 | Dynamic random access memory (DRAM) cells with repressed ferroelectric memory methods of reading same, and apparatuses including same | Leonard Forbes, Kie Y. Ahn, Wendell P. Noble | 2000-10-31 |
| 6136511 | Method of patterning substrates using multilayer resist processing | J. Brett Rolfson | 2000-10-24 |