Issued Patents All Time
Showing 26–50 of 77 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6831347 | Shallow trench isolation using low dielectric constant insulator | Klaus Schuegraf | 2004-12-14 |
| 6809395 | Isolation structure having trench structures formed on both side of a locos | Fernando Gonzales, Mike Violette, Nanseng Jeng, Klaus Schuegraf | 2004-10-26 |
| 6770571 | Barrier in gate stack for improved gate dielectric integrity | Nanseng Jeng | 2004-08-03 |
| 6743979 | Bonding pad isolation | Michael Berman, Qwai H. Low, Chok J. Chia, Ramaswamy Ranganathan | 2004-06-01 |
| 6664600 | Graded LDD implant process for sub-half-micron MOS devices | Charles H. Dennison | 2003-12-16 |
| 6660600 | Methods of forming integrated circuitry, methods of forming elevated source/drain regions of a field effect transistor, and methods of forming field effect transistors | Lyle Jones | 2003-12-09 |
| 6552394 | Semiconductor transistor devices and structures with halo regions | David J. Keller | 2003-04-22 |
| 6495885 | Graded LDD implant process for sub-half-micron MOS devices | Charles H. Dennison | 2002-12-17 |
| 6448141 | Graded LDD implant process for sub-half-micron MOS devices | Charles H. Dennison | 2002-09-10 |
| 6444529 | Methods of forming integrated circuitry and methods of forming elevated source/drain regions of a field effect transistor | Lyle Jones | 2002-09-03 |
| 6373114 | Barrier in gate stack for improved gate dielectric integrity | Nanseng Jeng | 2002-04-16 |
| 6346439 | Semiconductor transistor devices and methods for forming semiconductor transistor devices | David J. Keller | 2002-02-12 |
| 6333539 | Semiconductor transistor devices and methods for forming semiconductor transistor devices | David J. Keller | 2001-12-25 |
| 6326250 | Semiconductor processing method of fabricating field effect transistors | Kirk D. Prall | 2001-12-04 |
| 6319779 | Semiconductor transistor devices and methods for forming semiconductor transistor devices | David J. Keller | 2001-11-20 |
| 6281092 | Method for manufacturing a metal-to-metal capacitor utilizing only one masking step | — | 2001-08-28 |
| 6211026 | Methods of forming integrated circuitry, methods of forming elevated source/drain regions of a field effect transistor, and methods of forming field effect transistors | Lyle Jones | 2001-04-03 |
| 6165827 | Semiconductor transistor devices and methods for forming semiconductor transistor devices | David J. Keller | 2000-12-26 |
| 6159813 | Graded LDD implant process for sub-half-micron MOS devices | Charles H. Dennison | 2000-12-12 |
| 6150204 | Semiconductor processing method of fabricating field effect transistors | Kirk D. Prall | 2000-11-21 |
| 6136637 | Method of forming CMOS circuitry including patterning conductive material overlying field isolation oxide | David J. Keller, Tyler Lowrey | 2000-10-24 |
| 6130137 | Method of forming a resistor and integrated circuitry having a resistor construction | Kirk D. Prall, Pierre C. Fazan, Howard E. Rhodes, Werner Juengling, Pai-Hung Pan +1 more | 2000-10-10 |
| 6107145 | Method for forming a field effect transistor | Charles H. Dennison | 2000-08-22 |
| 6090685 | Method of forming a LOCOS trench isolation structure | Fernando Gonzales, Mike Violette, Nanseng Jeng, Klaus Schuegraf | 2000-07-18 |
| 6046472 | Graded LDD implant process for sub-half-micron MOS devices | Charles H. Dennison | 2000-04-04 |