SA

Sheldon Aronowitz

Lsi Logic: 53 patents #9 of 1,957Top 1%
NS National Semiconductor: 20 patents #61 of 2,238Top 3%
FS Fairchild Semiconductor: 2 patents #274 of 715Top 40%
LS Lsi: 2 patents #602 of 1,740Top 35%
📍 San Jose, CA: #436 of 32,062 inventorsTop 2%
🗺 California: #3,647 of 386,348 inventorsTop 1%
Overall (All Time): #24,556 of 4,157,543Top 1%
77
Patents All Time

Issued Patents All Time

Showing 26–50 of 77 patents

Patent #TitleCo-InventorsDate
6413881 PROCESS FOR FORMING THIN GATE OXIDE WITH ENHANCED RELIABILITY BY NITRIDATION OF UPPER SURFACE OF GATE OF OXIDE TO FORM BARRIER OF NITROGEN ATOMS IN UPPER SURFACE REGION OF GATE OXIDE, AND RESULTING PRODUCT John Haywood, James Kimball, Helmut Puchner, Ravindra M. Kapre, Nicholas K. Eib 2002-07-02
6331468 Formation of integrated circuit structure using one or more silicon layers for implantation and out-diffusion in formation of defect-free source/drain regions and also for subsequent formation of silicon nitride spacers Helmut Puchner, Ravindra Kapre, James Kimball 2001-12-18
6303047 Low dielectric constant multiple carbon-containing silicon oxide dielectric material for use in integrated circuit structures, and method of making same Valeriy Sukharev, Vladimir Zubkov 2001-10-16
6246093 Hybrid surface/buried-channel MOSFET Lindor E. Henrickson 2001-06-12
6180470 FETs having lightly doped drain regions that are shaped with counter and noncounter dorant elements Laique Khan, James Kimball 2001-01-30
6156620 Isolation trench in semiconductor substrate with nitrogen-containing barrier region, and process for forming same Helmut Puchner, Shih-Fen Huang 2000-12-05
6117749 Modification of interfacial fields between dielectrics and semiconductors Kranti V. Anand 2000-09-12
6093936 Integrated circuit with isolation of field oxidation by noble gas implantation Abraham Yee, Yu-Lam Ho 2000-07-25
6090651 Depletion free polysilicon gate electrodes Helmut Puchner, Gary K. Giust 2000-07-18
6087229 Composite semiconductor gate dielectrics David Chan, James Kimball, David Lee, John Haywood, Valeriy Sukharev 2000-07-11
6060375 Process for forming re-entrant geometry for gate electrode of integrated circuit structure Jon S. Owyang, James Kimball 2000-05-09
6033998 Method of forming variable thickness gate dielectrics David Chan, James Kimball, David Lee, John Haywood, Valeriy Sukharev 2000-03-07
5963801 Method of forming retrograde well structures and punch-through barriers using low energy implants Laique Khan, James Kimball 1999-10-05
5936285 Gate array layout to accommodate multi-angle ion implantation Nicholas F. Pasch, Aldona M. Butkus 1999-08-10
5904551 Process for low energy implantation of semiconductor substrate using channeling to form retrograde wells James Kimball 1999-05-18
5897381 Method of forming a layer and semiconductor substrate Nicholas K. Eib, Jon S. Owyang 1999-04-27
5893952 Apparatus for rapid thermal processing of a wafer Nicholas K. Eib, Jon S. Owyang 1999-04-13
5877530 Formation of gradient doped profile region between channel region and heavily doped source/drain contact region of MOS device in integrated circuit structure using a re-entrant gate electrode and a higher dose drain implantation Laique Khan, Philippe Schoenborn 1999-03-02
5858864 Process for making group IV semiconductor substrate treated with one or more group IV elements to form barrier region capable of inhibiting migration of dopant materials in substrate James Kimball 1999-01-12
5837598 Diffusion barrier for polysilicon gate electrode of MOS device in integrated circuit structure, and method of making same Valeriy Sukharev, Jon S. Owyang, John Haywood 1998-11-17
5756369 Rapid thermal processing using a narrowband infrared source and feedback Nicholas K. Eib, Jon S. Owyang 1998-05-26
5739580 Oxide formed in semiconductor substrate by implantation of substrate with a noble gas prior to oxidation James Kimball 1998-04-14
5723896 Integrated circuit structure with vertical isolation from single crystal substrate comprising isolation layer formed by implantation and annealing of noble gas atoms in substrate Abraham Yee 1998-03-03
5717238 Substrate with controlled amount of noble gas ions to reduce channeling and/or diffusion of a boron dopant forming P-LDD region of a PMOS device James Kimball, Yu-Lam Ho, Gobi R. Padmanabhan, Douglas T. Grider, Chi-Yi Kao 1998-02-10
5707888 Oxide formed in semiconductor substrate by implantation of substrate with a noble gas prior to oxidation James Kimball 1998-01-13