LK

Laique Khan

Lsi Logic: 3 patents #574 of 1,957Top 30%
Overall (All Time): #1,620,339 of 4,157,543Top 40%
3
Patents All Time

Issued Patents All Time

Patent #TitleCo-InventorsDate
6180470 FETs having lightly doped drain regions that are shaped with counter and noncounter dorant elements Sheldon Aronowitz, James Kimball 2001-01-30
5963801 Method of forming retrograde well structures and punch-through barriers using low energy implants Sheldon Aronowitz, James Kimball 1999-10-05
5877530 Formation of gradient doped profile region between channel region and heavily doped source/drain contact region of MOS device in integrated circuit structure using a re-entrant gate electrode and a higher dose drain implantation Sheldon Aronowitz, Philippe Schoenborn 1999-03-02