Issued Patents All Time
Showing 1–25 of 26 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8402412 | Increasing circuit speed and reducing circuit leakage by utilizing a local surface temperature effect | Cinti X. Chen, Xiao-Yu Li | 2013-03-19 |
| 8311659 | Identifying non-randomness in integrated circuit product yield | Cinti X. Chen | 2012-11-13 |
| 8166445 | Estimating Icc current temperature scaling factor of an integrated circuit | Cinti X. Chen, Yongjun Zheng | 2012-04-24 |
| 8000519 | Method of metal pattern inspection verification | Yongjun Zheng, David Mark, Felino E. Pagaduan | 2011-08-16 |
| 7020860 | Method for monitoring and improving integrated circuit fabrication using FPGAs | Xiao-Yu Li, Feng Wang, Zhi-Min Ling | 2006-03-28 |
| 6756674 | Low dielectric constant silicon oxide-based dielectric layer for integrated circuit structures having improved compatibility with via filler materials, and method of making same | Wilbur G. Catabay, Wei-Jen Hsia, Weidan Li | 2004-06-29 |
| 6368979 | Process for forming trenches and vias in layers of low dielectric constant carbon-doped silicon oxide dielectric material of an integrated circuit structure | Zhihai Wang, Wilbur G. Catabay | 2002-04-09 |
| 6297555 | Method to obtain a low resistivity and conformity chemical vapor deposition titanium film | Wei-Jen Hsia, Wilbur G. Catabay | 2001-10-02 |
| 6239499 | Consistent alignment mark profiles on semiconductor wafers using PVD shadowing | Shumay X. Dou, Wilbur G. Catabay | 2001-05-29 |
| 6232658 | Process to prevent stress cracking of dielectric films on semiconductor wafers | Wilbur G. Catabay, Wei-Jen Hsia | 2001-05-15 |
| 6204192 | Plasma cleaning process for openings formed in at least one low dielectric constant insulation layer over copper metallization in integrated circuit structures | Wei-Jen Hsia, Wilbur G. Catabay | 2001-03-20 |
| 6157087 | Consistent alignment mark profiles on semiconductor wafers using metal organic chemical vapor deposition titanium nitride protective layer | Shumay X. Dou, Keith K. Chao | 2000-12-05 |
| 6060787 | Consistent alignment mark profiles on semiconductor wafers using fine grain tungsten protective layer | Shumay X. Dou, Keith K. Chao | 2000-05-09 |
| 6059637 | Process for abrasive removal of copper from the back surface of a silicon substrate | Nicholas F. Pasch | 2000-05-09 |
| 6028015 | Process for treating damaged surfaces of low dielectric constant organo silicon oxide insulation material to inhibit moisture absorption | Zhihai Wang, Wilbur G. Catabay | 2000-02-22 |
| 5994775 | Metal-filled via/contact opening with thin barrier layers in integrated circuit structure for fast response, and process for making same | Wilbur G. Catabay | 1999-11-30 |
| 5981352 | Consistent alignment mark profiles on semiconductor wafers using fine grain tungsten protective layer | Shumay X. Dou, Keith K. Chao | 1999-11-09 |
| 5966613 | Consistent alignment mark profiles on semiconductor wafers using metal organic chemical vapor deposition titanium nitride protective | Shumay X. Dou, Keith K. Chao | 1999-10-12 |
| 5956613 | Method for improvement of TiN CVD film quality | Wilbur G. Catabay | 1999-09-21 |
| 5953631 | Low stress, highly conformal CVD metal thin film | Wilbur G. Catabay | 1999-09-14 |
| 5926720 | Consistent alignment mark profiles on semiconductor wafers using PVD shadowing | Wilbur G. Catabay, Shumay X. Dou | 1999-07-20 |
| 5895267 | Method to obtain a low resistivity and conformity chemical vapor deposition titanium film | Wei-Jen Hsia, Wilbur G. Catabay | 1999-04-20 |
| 5789028 | Method for eliminating peeling at end of semiconductor substrate in metal organic chemical vapor deposition of titanium nitride | Wei-Jen Hsia, Wilbur G. Catabay | 1998-08-04 |
| 5770520 | Method of making a barrier layer for via or contact opening of integrated circuit structure | Zhihai Wang, Wilbur G. Catabay | 1998-06-23 |
| 5660682 | Plasma clean with hydrogen gas | Zhihai Wang, Wilbur G. Catabay | 1997-08-26 |