Issued Patents All Time
Showing 1–12 of 12 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12068244 | Semiconductor device, template, and method of manufacturing template | Yasuhito Yoshimizu, Kosuke TAKAI | 2024-08-20 |
| 11776823 | Substrate processing method and substrate processing apparatus | Mana TANABE, Kosuke TAKAI, Kenji Masui | 2023-10-03 |
| 11443963 | Substrate processing method and substrate processing apparatus | Mana TANABE, Kosuke TAKAI, Kenji Masui | 2022-09-13 |
| 8567420 | Cleaning apparatus for semiconductor wafer | Minako Inukai, Hiroshi Tomita, Yasuhito Yoshimizu, Linan Ji | 2013-10-29 |
| 8114755 | Method of manufacturing semiconductor device | Ichiro Mizushima, Yoshio Ozawa, Takashi Nakao, Akihito Yamamoto, Takashi Suzuki +3 more | 2012-02-14 |
| 7538047 | Method of manufacturing semiconductor device | Atsuko Kawasaki, Takeshi Hoshi, Masahiro Kiyotoshi, Takatoshi Ono, Yoshihiro Ogawa | 2009-05-26 |
| 6979866 | Semiconductor device with SOI region and bulk region and method of manufacture thereof | Atsushi Azuma, Yusuke Kohyama | 2005-12-27 |
| 6963630 | Method for evaluating an SOI substrate, evaluation processor, and method for manufacturing a semiconductor device | Norihiko Tsuchiya | 2005-11-08 |
| 6919260 | Method of manufacturing a substrate having shallow trench isolation | Norihiko Tsuchiya, Yoshiaki Matsushita, Hiroyuki Kamijou, Atsushi Yagishita, Tsunehiro KITA | 2005-07-19 |
| 6365472 | Semiconductor device and method of manufacturing the same | Kazunari Ishimaru, Fumitomo Matsuoka | 2002-04-02 |
| 5998849 | Semiconductor device having highly-doped source/drain regions with interior edges in a dislocation-free state | Kazunari Ishimaru, Fumitomo Matsuoka | 1999-12-07 |
| 5994756 | Substrate having shallow trench isolation | Norihiko Tsuchiya, Yoshiaki Matsushita, Hiroyuki Kamijou, Atsushi Yagishita, Tsunehiro KITA | 1999-11-30 |