| 12027218 |
Location dependent sense time offset parameter for improvement to the threshold voltage distribution margin in non-volatile memory structures |
Prafful Golani, Ravi Kumar |
2024-07-02 |
| 11972801 |
Program voltage dependent program source levels |
Yu-Chung Lien, Sarath Puthenthermadam, Sujjatul Islam |
2024-04-30 |
| 11972809 |
Selective inhibit bitline voltage to cells with worse program disturb |
Sujjatul Islam, Yu-Chung Lien, Ravi Kumar |
2024-04-30 |
| 11972814 |
Verify techniques for current reduction in a memory device |
Yu-Chung Lien, Ravi Kumar, Jiahui Yuan, Bo Lei, Zhenni Wan |
2024-04-30 |
| 11894081 |
EP cycling dependent asymmetric/symmetric VPASS conversion in non-volatile memory structures |
Yu-Chung Lien, Ken Oowada |
2024-02-06 |
| 11749736 |
Three-dimensional memory device including discrete charge storage elements and methods for forming the same |
Raghuveer S. Makala, Fei Zhou, Senaka Kanakamedala, Ramy Nashed Bassely Said |
2023-09-05 |
| 11699494 |
Peak and average ICC reduction by tier-based sensing during program verify operations of non-volatile memory structures |
Yu-Chung Lien, Deepanshu Dutta, Huai-Yuan Tseng, Ravi Kumar |
2023-07-11 |
| 11568943 |
Memory apparatus and method of operation using zero pulse smart verify |
Dengtao Zhao, Deepanshu Dutta, Ravi Kumar |
2023-01-31 |
| 11475959 |
Reduced program time for memory cells using negative bit line voltage for enhanced step up of program bias |
Yu-Chung Lien, Sujjatul Islam |
2022-10-18 |
| 11475967 |
Modified verify in a memory device |
Muhammad Masuduzzaman, Ravi Kumar |
2022-10-18 |
| 11342035 |
Memory apparatus and method of operation using one pulse smart verify |
Deepanshu Dutta, Ravi Kumar |
2022-05-24 |
| 11302409 |
Programming techniques including an all string verify mode for single-level cells of a memory device |
Deepanshu Dutta, Huai-Yuan Tseng, Ravi Kumar, Cynthia Hsu |
2022-04-12 |
| 11177002 |
Programming memory cells using encoded TLC-fine |
Ravi Kumar, Deepanshu Dutta |
2021-11-16 |