Issued Patents All Time
Showing 25 most recent of 110 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11309319 | Structures and SRAM bit cells integrating complementary field-effect transistors | Bipul C. Paul, Julien Frougier, Ruilong Xie | 2022-04-19 |
| 11037937 | SRAM bit cells formed with dummy structures | Meixiong Zhao, Sanjay R. Parihar, Anton V. Tokranov, Hong Yu, Hongliang Shen +1 more | 2021-06-15 |
| 10818674 | Structures and SRAM bit cells integrating complementary field-effect transistors | Bipul C. Paul, Julien Frougier, Ruilong Xie | 2020-10-27 |
| 10629602 | Static random access memory cells with arranged vertical-transport field-effect transistors | Bipul C. Paul | 2020-04-21 |
| 10497692 | SRAM structure with alternate gate pitches | Hui Zang | 2019-12-03 |
| 10439064 | Dual port vertical transistor memory cell | Bipul C. Paul | 2019-10-08 |
| 10403629 | Six-transistor (6T) SRAM cell structure | Bipul C. Paul | 2019-09-03 |
| 10332897 | Method of reducing fin width in FinFet SRAM array to mitigate low voltage strap bit fails | Xiaoqiang Zhang, Hui Zang, Ratheesh R. Thankalekshmi | 2019-06-25 |
| 10163914 | Method of reducing fin width in FinFET SRAM array to mitigate low voltage strap bit fails | Xiaoqiang Zhang, Hui Zang, Ratheesh R. Thankalekshmi | 2018-12-25 |
| 10109637 | Cross couple structure for vertical transistors | Hui Zang, Bipul C. Paul | 2018-10-23 |
| 10068660 | Methods, apparatus, and system for global healing of write-limited die through bias temperature instability | Akhilesh Gautam, William F. McMahon, Yoann Mamy Randriamihaja, Yuncheng Song | 2018-09-04 |
| 10068902 | Integrated circuit structure incorporating non-planar field effect transistors with different channel region heights and method | Yanping Shen, Hui Zang, Hsien-Ching Lo, Yongjun Shi, Yi Qi +4 more | 2018-09-04 |
| 9916212 | Method, apparatus, and system for targeted healing of write fails through bias temperature instability | Akhilesh Gautam, William F. McMahon, Yoann Mamy Randriamihaja, Yuncheng Song | 2018-03-13 |
| 9761594 | Hardmask for a halo/extension implant of a static random access memory (SRAM) layout | Xusheng Wu, Bingwu Liu | 2017-09-12 |
| 9704600 | Method, apparatus, and system for global healing of write-limited die through bias temperature instability | Akhilesh Gautam, William F. McMahon, Yoann Mamy Randriamihaja, Yuncheng Song | 2017-07-11 |
| 9601188 | Method, apparatus and system for targeted healing of stability failures through bias temperature instability | Akhilesh Gautam, William F. McMahon, Yoann Mamy Randriamihaja, Yuncheng Song | 2017-03-21 |
| 9601187 | Method, apparatus, and system for global healing of stability-limited die through bias temperature instability | Akhilesh Gautam, William F. McMahon, Yoann Mamy Randriamihaja, Yuncheng Song | 2017-03-21 |
| 9564375 | Structures and methods for extraction of device channel width | Sandeep Puri, Sonia Ghosh, Anuj Gupta, Xusheng Wu | 2017-02-07 |
| 9530488 | Methods, apparatus and system determining dual port DC contention margin | Sriram Balasubramanian, Vivek Joshi, Ratheesh R. Thankalekshmi | 2016-12-27 |
| 9484300 | Device resulting from printing minimum width semiconductor features at non-minimum pitch | Sonia Ghosh, Norman Chen, Shaowen Gao | 2016-11-01 |
| 9372226 | Wafer test structures and methods of providing wafer test structures | Suresh Uppal, William F. McMahon | 2016-06-21 |
| 9337204 | Memory cell | Benton H. Calhoun | 2016-05-10 |
| 9263349 | Printing minimum width semiconductor features at non-minimum pitch and resulting device | Sonia Ghosh, Norman Chen, Shaowen Gao | 2016-02-16 |
| 9219040 | Integrated circuit with semiconductor fin fuse | Kingsuk Maitra, Anurag Mittal | 2015-12-22 |
| 9202552 | Dual port SRAM bitcell structures with improved transistor arrangement | Bipul C. Paul, Sangmoon Kim | 2015-12-01 |