Issued Patents All Time
Showing 1–24 of 24 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10283196 | Data writing method, memory control circuit unit and memory storage apparatus | Chih-Kang Yeh | 2019-05-07 |
| 9383995 | Load ordering in a weakly-ordered processor | Pradeep Kanapathipillai, Hari Kannan, Ming-Ta Hsu, Rajat Goel | 2016-07-05 |
| 8892841 | Store handling in a processor | Ramesh Gunna, Sudarshan Kadambi | 2014-11-18 |
| 8316188 | Data prefetch unit utilizing duplicate cache tags | Sudarshan Kadambi, Puneet Kumar | 2012-11-20 |
| 8285937 | Fused store exclusive/memory barrier operation | Peter J. Bannon | 2012-10-09 |
| 8255670 | Replay reduction for power saving | Wei-Han Lien, Jesse Pan, Ramesh Gunna, Tse-Yu Yeh, James B. Keller | 2012-08-28 |
| 8239638 | Store handling in a processor | Ramesh Gunna, Sudarshan Kadambi | 2012-08-07 |
| 8219787 | Early release of resources by proceeding to retire store operations from exception reporting stage but keeping in load/store queue | Wei-Han Lien | 2012-07-10 |
| 8171240 | Misalignment predictor | Tse-Yu Yeh, Eric Hao | 2012-05-01 |
| 8117404 | Misalignment predictor | Tse-Yu Yeh, Eric Hao | 2012-02-14 |
| 7996624 | Prefetch unit | Sudarshan Kadambi, Puneet Kumar | 2011-08-09 |
| 7996646 | Efficient encoding for detecting load dependency on store with misalignment | Tse-Yu Yeh, Daniel C. Murray, Anup S. Mehta | 2011-08-09 |
| 7984274 | Partial load/store forward prediction | Sudarshan Kadambi, Eric Hao | 2011-07-19 |
| 7962730 | Replaying memory operation assigned a load/store buffer entry occupied by store operation processed beyond exception reporting stage and retired from scheduler | Wei-Han Lien | 2011-06-14 |
| 7779208 | Prefetch unit | Sudarshan Kadambi, Puneet Kumar | 2010-08-17 |
| 7721066 | Efficient encoding for detecting load dependency on store with misalignment | Tse-Yu Yeh, Daniel C. Murray, Anup S. Mehta | 2010-05-18 |
| 7647518 | Replay reduction for power saving | Wei-Han Lien, Jesse Pan, Ramesh Gunna, Tse-Yu Yeh, James B. Keller | 2010-01-12 |
| 7568087 | Partial load/store forward prediction | Sudarshan Kadambi, Eric Hao | 2009-07-28 |
| 7493451 | Prefetch unit | Sudarshan Kadambi, Puneet Kumar | 2009-02-17 |
| 7472260 | Early retirement of store operation past exception reporting pipeline stage in strongly ordered processor with load/store queue entry retained until completion | Wei-Han Lien | 2008-12-30 |
| 7398361 | Combined buffer for snoop, store merging, load miss, and writeback operations | Ramesh Gunna, Sridhar Subramanian, James B. Keller, Tse-Yuh Yeh | 2008-07-08 |
| 7376817 | Partial load/store forward prediction | Sudarshan Kadambi, Eric Hao | 2008-05-20 |
| 7162613 | Mechanism for processing speculative LL and SC instructions in a pipelined processor | Tse-Yu Yeh, Mark Pearce, Zongjian Chen | 2007-01-09 |
| 6877085 | Mechanism for processing speclative LL and SC instructions in a pipelined processor | Tse-Yu Yeh, Mark Pearce, Zongjian Chen | 2005-04-05 |