Issued Patents All Time
Showing 25 most recent of 26 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12401605 | Communication fabric structures for increased bandwidth | Sergio Kolor, Dan Darel, Lior Zimet, Lital Levy-Rubin, Roi Uziel +3 more | 2025-08-26 |
| 10204051 | Technique to share information among different cache coherency domains | Zeev Offen, Ariel Berkovits, Thomas A. Piazza, Robert L. Farrell, Altug Koker | 2019-02-12 |
| 10078590 | Technique to share information among different cache coherency domains | Zeev Offen, Ariel Berkovits, Thomas A. Piazza, Robert L. Farrell, Altug Koker | 2018-09-18 |
| 9946650 | Technique to share information among different cache coherency domains | Zeev Offen, Ariel Berkovits, Thomas A. Piazza, Robert L. Farrell, Altug Koker | 2018-04-17 |
| 9665488 | Technique to share information among different cache coherency domains | Zeev Offen, Ariel Berkovits, Thomas A. Piazza, Robert L. Farrell, Altug Koker | 2017-05-30 |
| 9035960 | Technique to share information among different cache coherency domains | Zeev Offen, Ariel Berkovits, Thomas A. Piazza, Robert L. Farrell, Altug Koker | 2015-05-19 |
| 9035959 | Technique to share information among different cache coherency domains | Zeev Offen, Ariel Berkovits, Thomas A. Piazza, Robert L. Farrell, Altug Koker | 2015-05-19 |
| 9035962 | Technique to share information among different cache coherency domains | Zeev Offen, Ariel Berkovits, Thomas A. Piazza, Robert L. Farrell, Altug Koker | 2015-05-19 |
| 8643660 | Technique to share information among different cache coherency domains | Zeev Offen, Ariel Berkovits, Thomas A. Piazza, Robert L. Farrell, Altug Koker | 2014-02-04 |
| 7975161 | Reducing CPU and bus power when running in power-save modes | — | 2011-07-05 |
| 7418561 | Adaptive throttling of memory accesses, such as throttling RDRAM accesses in a real-time system | Erez Birenzwig | 2008-08-26 |
| 7363476 | Method and apparatus to support an expanded register set | Alexander Peleg, Bob Valentine | 2008-04-22 |
| 7290161 | Reducing CPU and bus power when running in power-save modes | — | 2007-10-30 |
| 6904504 | Method and apparatus for software selection of protected register settings | Alon Naveh | 2005-06-07 |
| 6886105 | Method and apparatus for resuming memory operations from a low latency wake-up low power state | Doron Orenstein | 2005-04-26 |
| 6842831 | Low latency buffer control system and method | Jeffrey R. Wilcox, Alon Naveh | 2005-01-11 |
| 6820169 | Memory control with lookahead power management | Jeffrey R. Wilcox | 2004-11-16 |
| 6799241 | Method for dynamically adjusting a memory page closing policy | Jeffrey R. Wilcox | 2004-09-28 |
| 6725362 | Method for encoding an instruction set with a load with conditional fault instruction | Robert Valentine | 2004-04-20 |
| 6678816 | Method for optimized representation of page table entries | Ronny Ronen, Andrew F. Glew, Maury J. Bach, Robert Valentine, Richard Uhlig | 2004-01-13 |
| 6662278 | Adaptive throttling of memory acceses, such as throttling RDRAM accesses in a real-time system | Erez Birenzwig | 2003-12-09 |
| 6647482 | Method for optimized representation of page table entries | Ronny Ronen, Andrew F. Glew, Maury J. Bach, Robert Valentine, Richard Uhlig | 2003-11-11 |
| 6625724 | Method and apparatus to support an expanded register set | Alexander Peleg, Bob Valentine | 2003-09-23 |
| 6593930 | Method and apparatus to execute a memory maintenance operation during a screen blanking interval | Gad Sheaffer | 2003-07-15 |
| 6510099 | Memory control with dynamic driver disabling | Jeffrey R. Wilcox | 2003-01-21 |