MD

Michael Duane

AM AMD: 40 patents #206 of 9,279Top 3%
ML Mie Fujitsu Semiconductor Limited: 8 patents #12 of 49Top 25%
TI Texas Instruments: 4 patents #3,281 of 12,488Top 30%
Applied Materials: 3 patents #2,994 of 7,310Top 45%
BL Block: 3 patents #135 of 545Top 25%
SU Suvolta: 3 patents #19 of 61Top 35%
Overall (All Time): #37,604 of 4,157,543Top 1%
61
Patents All Time

Issued Patents All Time

Showing 25 most recent of 61 patents

Patent #TitleCo-InventorsDate
12293351 Peer-to-peer data object transfer and state management Matthew Hickman, Steven Austin, Benjamin Shen 2025-05-06
11842345 Rewards for a virtual cash card Benjamin Shen, Rebecca Corcillo, Owen Jennings 2023-12-12
11526882 Cryptocurrency rewards for a virtual cash card Benjamin Shen, Rebecca Corcillo, Owen Jennings 2022-12-13
10217838 Semiconductor structure with multiple transistors having various threshold voltages Dalong Zhao, Teymur Bakhishev, Lance Scudder, Paul E. Gregory, U.C. Sridharan +3 more 2019-02-26
10014387 Semiconductor structure with multiple transistors having various threshold voltages Dalong Zhao, Teymur Bakhishev, Lance Scudder, Paul E. Gregory, U.C. Sridharan +3 more 2018-07-03
9812550 Semiconductor structure with multiple transistors having various threshold voltages Dalong Zhao, Teymur Bakhishev, Lance Scudder, Paul E. Gregory, U.C. Sridharan +3 more 2017-11-07
9391076 CMOS structures and processes based on selective thinning Scott E. Thompson, Thomas Hoffmann, Lance Scudder, Urupattur C. Sridharan, Dalong Zhao +2 more 2016-07-12
9368624 Method for fabricating a transistor with reduced junction leakage current Scott E. Thompson, Lucian Shifren, Pushkar Ranade, Yujie Liu, Sung Hwan Kim +5 more 2016-06-14
9299698 Semiconductor structure with multiple transistors having various threshold voltages Dalong Zhao, Teymur Bakhishev, Lance Scudder, Paul E. Gregory, U.C. Sridharan +3 more 2016-03-29
9196727 High uniformity screen and epitaxial layers for CMOS devices Scott E. Thompson, Lucian Shifren, Pushkar Ranade, Yujie Liu, Sung Hwan Kim +5 more 2015-11-24
9041126 Deeply depleted MOS transistors having a screening layer and methods thereof Thomas Hoffmann, Lucian Shifren, Scott E. Thompson, Pushkar Ranade, Jing Wang +10 more 2015-05-26
8999861 Semiconductor structure with substitutional boron and method for fabrication thereof Lance Scudder, Pushkar Ranade, Charles Stager, Lucian Shifren, Dalong Zhao +1 more 2015-04-07
8883600 Transistor having reduced junction leakage and methods of forming thereof Scott E. Thompson, Lucian Shifren, Pushkar Ranade, Yujie Liu, Sung Hwan Kim +5 more 2014-11-11
8614128 CMOS structures and processes based on selective thinning Scott E. Thompson, Thomas Hoffmann, Lance Scudder, U.C. Sridharan, Dalong Zhao +2 more 2013-12-24
8293460 Double exposure patterning with carbonaceous hardmask Hui-Wan Chen, Chorng-Ping Chang, Yongmei Chen, Huixiong Dai, Jiahua Yu +7 more 2012-10-23
7459319 Method and apparatus for characterizing features formed on a substrate Michael C. Smayling, Susie Xiuru Yang 2008-12-02
7196350 Method and apparatus for characterizing features formed on a substrate Michael C. Smayling, Susie Xiuru Yang 2007-03-27
6743685 Semiconductor device and method for lowering miller capacitance for high-speed microprocessors David Wu, Scott Luning 2004-06-01
6727558 Channel isolation using dielectric isolation structures David Wu, Massud Aminpur, Scott Luning 2004-04-27
6617219 Semiconductor device and method for lowering miller capacitance by modifying source/drain extensions for high speed microprocessors David Wu, Massud Aminpur, Scott Luning 2003-09-09
6420730 Elevated transistor fabrication technique Mark I. Gardner, Daniel Kadosh 2002-07-16
6376350 Method of forming low resistance gate electrode Jeffrey C. Haines, Frederick N. Hause 2002-04-23
6329695 Merged sidewall spacer formed between series-connected MOSFETs for improved integrated circuit operation Steven E. Bourland 2001-12-11
6300661 Mutual implant region used for applying power/ground to a source of a transistor and a well of a substrate Daniel Kadosh, Mark I. Gardner 2001-10-09
6200862 Mask for asymmetrical transistor formation with paired transistors Mark I. Gardner, Frederick N. Hause 2001-03-13