Issued Patents All Time
Showing 25 most recent of 69 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10325986 | Advanced transistors with punch through suppression | Lucian Shifren, Paul E. Gregory, Sachin R. Sonkusale, Weimin Zhang, Scott E. Thompson | 2019-06-18 |
| 10217838 | Semiconductor structure with multiple transistors having various threshold voltages | Dalong Zhao, Teymur Bakhishev, Lance Scudder, Paul E. Gregory, Michael Duane +3 more | 2019-02-26 |
| 10014387 | Semiconductor structure with multiple transistors having various threshold voltages | Dalong Zhao, Teymur Bakhishev, Lance Scudder, Paul E. Gregory, Michael Duane +3 more | 2018-07-03 |
| 9991300 | Buried channel deeply depleted channel transistor | Teymur Bakhishev, Lingquan Wang, Dalong Zhao, Scott E. Thompson | 2018-06-05 |
| 9922977 | Transistor with threshold voltage set notch and method of fabrication thereof | Reza Arghavani, Lucian Shifren, Scott E. Thompson, Catherine de Villeneuve | 2018-03-20 |
| 9865596 | Low power semiconductor transistor structure and method of fabrication thereof | Lucian Shifren, Scott E. Thompson, Sachin R. Sonkusale, Weimin Zhang | 2018-01-09 |
| 9847420 | Active regions with compatible dielectric layers | — | 2017-12-19 |
| 9812550 | Semiconductor structure with multiple transistors having various threshold voltages | Dalong Zhao, Teymur Bakhishev, Lance Scudder, Paul E. Gregory, Michael Duane +3 more | 2017-11-07 |
| 9793172 | Reducing or eliminating pre-amorphization in transistor manufacture | Lance Scudder, Charles Stager, Urupattur C. Sridharan, Dalong Zhao | 2017-10-17 |
| 9786703 | Buried channel deeply depleted channel transistor | Teymur Bakhishev, Lingquan Wang, Dalong Zhao, Scott E. Thompson | 2017-10-10 |
| 9646822 | Active regions with compatible dielectric layers | — | 2017-05-09 |
| 9515142 | Active regions with compatible dielectric layers | — | 2016-12-06 |
| 9514940 | Reducing or eliminating pre-amorphization in transistor manufacture | Lance Scudder, Charles Stager, Urupattur C. Sridharan, Dalong Zhao | 2016-12-06 |
| 9508800 | Advanced transistors with punch through suppression | Lucian Shifren, Paul E. Gregory, Sachin R. Sonkusale, Weimin Zhang, Scott E. Thompson | 2016-11-29 |
| 9508728 | CMOS gate stack structures and processes | Thomas Hoffmann, Scott E. Thompson | 2016-11-29 |
| 9496261 | Low power semiconductor transistor structure and method of fabrication thereof | Lucian Shifren, Scott E. Thompson, Sachrin R. Sonkusale, Weimin Zhang | 2016-11-15 |
| 9478571 | Buried channel deeply depleted channel transistor | Teymur Bakhishev, Lingquan Wang, Dalong Zhao, Scott E. Thompson | 2016-10-25 |
| 9418987 | Transistor with threshold voltage set notch and method of fabrication thereof | Reza Arghavani, Lucian Shifren, Scott E. Thompson, Catherine de Villeneuve | 2016-08-16 |
| 9406567 | Method for fabricating multiple transistor devices on a substrate with varying threshold voltages | Lucian Shifren, Thomas Hoffmann, Scott E. Thompson | 2016-08-02 |
| 9397165 | Active regions with compatible dielectric layers | — | 2016-07-19 |
| 9391076 | CMOS structures and processes based on selective thinning | Scott E. Thompson, Thomas Hoffmann, Lance Scudder, Urupattur C. Sridharan, Dalong Zhao +2 more | 2016-07-12 |
| 9385047 | Integrated circuits having a plurality of high-K metal gate FETs with various combinations of channel foundation structure and gate stack structure and methods of making same | Dalong Zhao, Bruce McWilliams | 2016-07-05 |
| 9368624 | Method for fabricating a transistor with reduced junction leakage current | Scott E. Thompson, Lucian Shifren, Yujie Liu, Sung Hwan Kim, Lingquan Wang +5 more | 2016-06-14 |
| 9299698 | Semiconductor structure with multiple transistors having various threshold voltages | Dalong Zhao, Teymur Bakhishev, Lance Scudder, Paul E. Gregory, Michael Duane +3 more | 2016-03-29 |
| 9287364 | Active regions with compatible dielectric layers | — | 2016-03-15 |