CV

Catherine de Villeneuve

ML Mie Fujitsu Semiconductor Limited: 2 patents #31 of 49Top 65%
SU Suvolta: 1 patents #34 of 61Top 60%
📍 San Jose, CA: #14,517 of 32,062 inventorsTop 50%
🗺 California: #149,087 of 386,348 inventorsTop 40%
Overall (All Time): #1,475,261 of 4,157,543Top 40%
3
Patents All Time

Issued Patents All Time

Showing 1–3 of 3 patents

Patent #TitleCo-InventorsDate
9922977 Transistor with threshold voltage set notch and method of fabrication thereof Reza Arghavani, Pushkar Ranade, Lucian Shifren, Scott E. Thompson 2018-03-20
9418987 Transistor with threshold voltage set notch and method of fabrication thereof Reza Arghavani, Pushkar Ranade, Lucian Shifren, Scott E. Thompson 2016-08-16
8759872 Transistor with threshold voltage set notch and method of fabrication thereof Reza Arghavani, Pushkar Ranade, Lucian Shifren, Scott E. Thompson 2014-06-24