Issued Patents All Time
Showing 1–18 of 18 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10217838 | Semiconductor structure with multiple transistors having various threshold voltages | Dalong Zhao, Teymur Bakhishev, Paul E. Gregory, Michael Duane, U.C. Sridharan +3 more | 2019-02-26 |
| 10014387 | Semiconductor structure with multiple transistors having various threshold voltages | Dalong Zhao, Teymur Bakhishev, Paul E. Gregory, Michael Duane, U.C. Sridharan +3 more | 2018-07-03 |
| 9812550 | Semiconductor structure with multiple transistors having various threshold voltages | Dalong Zhao, Teymur Bakhishev, Paul E. Gregory, Michael Duane, U.C. Sridharan +3 more | 2017-11-07 |
| 9793172 | Reducing or eliminating pre-amorphization in transistor manufacture | Pushkar Ranade, Charles Stager, Urupattur C. Sridharan, Dalong Zhao | 2017-10-17 |
| 9514940 | Reducing or eliminating pre-amorphization in transistor manufacture | Pushkar Ranade, Charles Stager, Urupattur C. Sridharan, Dalong Zhao | 2016-12-06 |
| 9391076 | CMOS structures and processes based on selective thinning | Scott E. Thompson, Thomas Hoffmann, Urupattur C. Sridharan, Dalong Zhao, Pushkar Ranade +2 more | 2016-07-12 |
| 9299698 | Semiconductor structure with multiple transistors having various threshold voltages | Dalong Zhao, Teymur Bakhishev, Paul E. Gregory, Michael Duane, U.C. Sridharan +3 more | 2016-03-29 |
| 9112057 | Semiconductor devices with dopant migration suppression and method of fabrication thereof | Sameer Pradhan, Dalong Zhao, Lingquan Wang, Pushkar Ranade | 2015-08-18 |
| 9105711 | Semiconductor structure with reduced junction leakage and method of fabrication thereof | Lingquan Wang, Teymur Bakhishev, Dalong Zhao, Pushkar Ranade, Sameer Pradhan +2 more | 2015-08-11 |
| 9041126 | Deeply depleted MOS transistors having a screening layer and methods thereof | Thomas Hoffmann, Lucian Shifren, Scott E. Thompson, Pushkar Ranade, Jing Wang +10 more | 2015-05-26 |
| 8999861 | Semiconductor structure with substitutional boron and method for fabrication thereof | Pushkar Ranade, Charles Stager, Lucian Shifren, Dalong Zhao, U.C. Sridharan +1 more | 2015-04-07 |
| 8937005 | Reducing or eliminating pre-amorphization in transistor manufacture | Pushkar Ranade, Charles Stager, Urupattur C. Sridharan, Dalong Zhao | 2015-01-20 |
| 8877619 | Process for manufacture of integrated circuits with different channel doping transistor architectures and devices therefrom | Scott E. Thompson, Lucian Shifren, Pushkar Ranade, Dalong Zhao, Teymur Bakhisher +1 more | 2014-11-04 |
| 8796048 | Monitoring and measurement of thin film layers | Scott E. Thompson, Pushkar Ranade, Charles Stager | 2014-08-05 |
| 8778786 | Method for substrate preservation during transistor fabrication | Pushkar Ranade, Dalong Zhao, Teymur Bakhishev, Urupattur C. Sridharan, Taiji Ema +5 more | 2014-07-15 |
| 8637955 | Semiconductor structure with reduced junction leakage and method of fabrication thereof | Lingquan Wang, Teymur Bakhishev, Dalong Zhao, Pushkar Ranade, Sameer Pradhan +2 more | 2014-01-28 |
| 8614128 | CMOS structures and processes based on selective thinning | Scott E. Thompson, Thomas Hoffmann, U.C. Sridharan, Dalong Zhao, Pushkar Ranade +2 more | 2013-12-24 |
| 8569156 | Reducing or eliminating pre-amorphization in transistor manufacture | Pushkar Ranade, Charles Stager, Urupattur C. Sridharan, Dalong Zhao | 2013-10-29 |