Issued Patents All Time
Showing 1–23 of 23 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7670915 | Contact liner in integrated circuit technology | Errol Todd Ryan, Paul R. Besser, Simon S. Chan, Robert J. Chiu, Minh Van Ngo | 2010-03-02 |
| 7093209 | Method and apparatus for packaging test integrated circuits | — | 2006-08-15 |
| 6995564 | Method and system for locating chip-level defects through emission imaging of a semiconductor device | Boon Yong Ang, Mohammed Massoodi | 2006-02-07 |
| 6991946 | Method and system for providing backside voltage contrast for silicon on insulator devices | Mohammad Massodi, Caiwen Yuan | 2006-01-31 |
| 6941529 | Method and system for using emission microscopy in physical verification of memory device architecture | Shivananda Shetty, W. Eugen Hill | 2005-09-06 |
| 6866416 | Detecting heat generating failures in unpassivated semiconductor devices | Alice H. Choi, Mohammad Massoodi, Boon Yong Ang | 2005-03-15 |
| 6830941 | Method and apparatus for identifying individual die during failure analysis | Chern-Jiann Lee, Boon Yong Ang, David Lin | 2004-12-14 |
| 6770495 | Method for revealing active regions in a SOI structure for DUT backside inspection | Boon Yong Ang | 2004-08-03 |
| 6770512 | Method and system for using TMAH for staining copper silicon on insulator semiconductor device cross sections | Mohammad Masoodi, Bryan Tracy | 2004-08-03 |
| 6528332 | Method and system for reducing polymer build up during plasma etch of an intermetal dielectric | Mohammad Massoodi, Jose Hulog | 2003-03-04 |
| 6485361 | Apparatus for holding and delayering a semiconductor die | — | 2002-11-26 |
| 6452234 | How to improve the ESD on SOI devices | — | 2002-09-17 |
| 6395129 | Process to decapsulate a FBGA package | Joseph Vu | 2002-05-28 |
| 6387206 | Method and system for plastic package decapsulation of electronic devices | Ahmad Ghaemmaghami | 2002-05-14 |
| 6320400 | Method and system for selectively disconnecting a redundant power distribution network to indentify a site of a short | J. Courtney Black, Richard C. Blish, II, Mohammad Massoodi, S. Sidharth | 2001-11-20 |
| 6309899 | Method and system for removing a die from a semiconductor package | Jose Hulog | 2001-10-30 |
| 6304792 | Separation of a multi-layer integrated circuit device and package | — | 2001-10-16 |
| 6253353 | Method and system for providing a library for identifying VCC to ground shorts in a circuit in a semiconductor device | Jose Hulog | 2001-06-26 |
| 6227941 | Support structure with multi-layer support material for use during package removal from a multi-layer integrated circuit device | — | 2001-05-08 |
| 6181153 | Method and system for detecting faults in a flip-chip package | — | 2001-01-30 |
| 6127194 | Package removal for FBGA devices | Mohammad Massoodi | 2000-10-03 |
| 6076686 | Support structure for use during package removal from a multi-layer integrated circuit device | S. Sidharth | 2000-06-20 |
| 6030282 | Method and apparatus for holding, grinding and polishing a packaged semiconductor die | — | 2000-02-29 |