IC

Ih-Chin Chen

TI Texas Instruments: 18 patents #707 of 12,488Top 6%
TSMC: 1 patents #8,466 of 12,232Top 70%
Overall (All Time): #242,061 of 4,157,543Top 6%
19
Patents All Time

Issued Patents All Time

Patent #TitleCo-InventorsDate
6960499 Dual-counterdoped channel field effect transistor and method Mahalingam Nandakumar, Karthik Vasanth 2005-11-01
6835622 Gate electrode doping method for forming semiconductor integrated circuit microelectronic fabrication with varying effective gate dielectric layer thicknesses Ling-Yen Yeh, Jyh-Chyurn Guo 2004-12-28
6420236 Hydrogen treatment for threshold voltage shift of metal gate MOSFET devices Jerry Hu, Hong-Seon Yang, Amitava Chatterjee 2002-07-16
6313010 Integrated circuit insulator and method Somnath Nag, Amitava Chatterjee 2001-11-06
6306724 Method of forming a trench isolation structure in a stack trench capacitor fabrication process — 2001-10-23
6287924 Integrated circuit and method Chih-Ping Chao, Rick L. Wise, Katherine E. Violette, Sreenath Unnikrishnan 2001-09-11
6228725 Semiconductor devices with pocket implant and counter doping Mahalingam Nandakumar, Amitava Chatterjee, Mark S. Rodder 2001-05-08
6147384 Method for forming planar field effect transistors with source and drain an insulator and device constructed therefrom — 2000-11-14
6143625 Protective liner for isolation trench side walls and method Amitava Chatterjee, Somnath Nag 2000-11-07
5917219 Semiconductor devices with pocket implant and counter doping Mahalingam Nandakumar, Amitava Chatterjee, Mark S. Rodder 1999-06-29
5913135 Method for forming planar field effect transistors with source and drain on oxide and device constructed therefrom — 1999-06-15
5909628 Reducing non-uniformity in a refill layer thickness for a semiconductor device Amitava Chatterjee, Theodore W. Houston, Agerico L. Esquirel, Somnath Nag, Iqbal Ali +4 more 1999-06-01
5894145 Multiple substrate bias random access memory device Hisashi Shichijo, Clarence W. Teng 1999-04-13
5739569 Non-volatile memory cell with oxide and nitride tunneling layers — 1998-04-14
5595925 Method for fabricating a multiple well structure for providing multiple substrate bias for DRAM device formed therein Hisashi Shichijo, Clarence W. Teng 1997-01-21
5548548 Pass transistor for a 256 megabit dram with negatively biased substrate Amitava Chatterjee, Jiann Liu, Purnendu K. Mozumder, Mark S. Rodder 1996-08-20
5274261 Integrated circuit degradation resistant structure — 1993-12-28
4888820 Stacked insulating film including yttrium oxide Bing W. Shen, James G. Bohlman, Hun-Lian Tsai 1989-12-19
4882649 Nitride/oxide/nitride capacitor dielectric Bing W. Shen, Robert Reid Doering 1989-11-21