Issued Patents All Time
Showing 1–8 of 8 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9905562 | Semiconductor integrated circuit layout structure | Shih-Chin Lin, Kuei-Chun Hung, Ming-Jui Chen, Chen-Hsien Hsu | 2018-02-27 |
| 9673145 | Semiconductor integrated circuit layout structure | Shih-Chin Lin, Kuei-Chun Hung, Ming-Jui Chen, Chen-Hsien Hsu | 2017-06-06 |
| 9653346 | Integrated FinFET structure having a contact plug pitch larger than fin and first metal pitch | Shih-Chin Lin, Kuei-Chun Hung, Ming-Jui Chen, Chen-Hsien Hsu | 2017-05-16 |
| 8501580 | Process of fabricating semiconductor device with low capacitance for high-frequency circuit protection | Panchien Lin, Bert Huang | 2013-08-06 |
| 6835623 | NMOS ESD protection device with thin silicide and methods for making same | Wei-Tsun Shiau, Craig T. Salling | 2004-12-28 |
| 6563175 | NMOS ESD protection device with thin silicide and methods for making same | Wei-Tsun Shiau, Craig T. Salling | 2003-05-13 |
| 6420236 | Hydrogen treatment for threshold voltage shift of metal gate MOSFET devices | Hong-Seon Yang, Amitava Chatterjee, Ih-Chin Chen | 2002-07-16 |
| 6352900 | Controlled oxide growth over polysilicon gates for improved transistor characteristics | Manoj Mehrotra, Amitava Chatterjee, Mark S. Rodder | 2002-03-05 |