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Craig T. Salling — 34 Patents

Micron: 22 patents #819 of 6,374Top 15%

TITexas Instruments: 11 patents #1,295 of 12,488Top 15%

TST-Ram Semiconductor: 1 patents #16 of 26Top 65%

Plano, TX: #166 of 4,842 inventorsTop 4%

Texas: #3,248 of 125,132 inventorsTop 3%

Overall (All Time): #100,737 of 4,157,543Top 3%

34 Patents All Time

Craig T. Salling has been granted 34 US patents while listed as an inventor at Micron. The first was granted in 2002 and the most recent in August 2007. Craig T. Salling ranks #100,737 of 4,157,543 US inventors in our database (top 2.4%). Patent records list Craig T. Salling in Plano, TX, US.

Patents per Year

Issued Patents All Time

Showing 1–25 of 34 patents

Patent #	Title	Co-Inventors	Date	Approx Value ⓘ
7256460	Body-biased pMOS protection against electrostatic discharge	Charvaka Duvvury, Gianluca Boselli	2007-08-14	$14,368,000
7253464	Junction-isolated depletion mode ferroelectric memory devices and systems	Brian W. Huber	2007-08-07	$1,952,000
7236387	Writing to ferroelectric memory devices	—	2007-06-26	$1,771,000
7199413	Junction-isolated depletion mode ferroelectric memory devices and systems	Brian W. Huber	2007-04-03	$1,555,000
7187530	Electrostatic discharge protection circuit	Siak Chon Kee, Pierre Dermy	2007-03-06
7123503	Writing to ferroelectric memory devices	—	2006-10-17	$1,850,000
7002198	Junction-isolated depletion mode ferroelectric memory devices	Brian W. Huber	2006-02-21	$2,924,000
6982449	Junction-isolated depletion mode ferroelectric memory devices	Brian W. Huber	2006-01-03	$1,955,000
6944043	Junction-isolated depletion mode ferroelectric memory devices	Brian W. Huber	2005-09-13	$2,019,000
6937501	Writing to ferroelectric memory devices	—	2005-08-30	$1,004,000
6903960	Junction-isolated depletion mode ferroelectric memory devices	Brian W. Huber	2005-06-07	$1,113,000
6900969	ESD protection with uniform substrate bias	Roger A. Cline	2005-05-31	$23,032,000
6888185	Junction-isolated depletion mode ferroelectric memory devices	Brian W. Huber	2005-05-03	$925,000
6888738	Methods of writing junction-isolated depletion mode ferroelectric memory devices	Brian W. Huber	2005-05-03	$925,000
6888747	Methods of reading junction-isolated depletion mode ferroelectric memory devices	Brian W. Huber	2005-05-03	$925,000
6882560	Reading ferroelectric memory cells	—	2005-04-19	$902,000
6876022	Junction-isolated depletion mode ferroelectric memory devices	Brian W. Huber	2005-04-05	$1,884,000
6875650	Eliminating substrate noise by an electrically isolated high-voltage I/O transistor	Zhiqiang Wu	2005-04-05	$21,149,000
6858902	Efficient ESD protection with application for low capacitance I/O pads	Charvaka Duvvury	2005-02-22	$26,573,000
6835623	NMOS ESD protection device with thin silicide and methods for making same	Wei-Tsun Shiau, Jerry Hu	2004-12-28	$31,944,000
6791862	Junction-isolated depletion mode ferroelectric memory devices	Brian W. Huber	2004-09-14	$1,322,000
6767810	Method to increase substrate potential in MOS transistors used in ESD protection circuits	Amitava Chatterjee, Youngmin Kim	2004-07-27	$15,283,000
6764909	Structure and method of MOS transistor having increased substrate resistance	Zhiqiang Wu, Che-Jen Hu	2004-07-20	$14,138,000
6724050	ESD improvement by a vertical bipolar transistor with low breakdown voltage and high beta	Zhiqiang Wu	2004-04-20	$14,356,000
6665206	Array architecture for depletion mode ferroelectric memory devices	—	2003-12-16	$2,294,000