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Electrostatic discharge protection device for high voltage |
Kyle Schulmeyer |
2019-01-08 |
| 9768159 |
Electrostatic discharge protection device for high voltage |
Kyle Schulmeyer |
2017-09-19 |
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ESD protection using diode-isolated gate-grounded nMOS with diode string |
Ponnarith Pok, Kyle Schulmeyer, Charvaka Duvvury |
2016-02-23 |
| 8829618 |
ESD protection using diode-isolated gate-grounded NMOS with diode string |
Ponnarith Pok, Kyle Schulmeyer, Charvaka Duvvury |
2014-09-09 |
| 7167350 |
Design implementation to suppress latchup in voltage tolerant circuits |
Jorge Salcedo-Suner, Charvaka Duvvury, Jose A. Cadena-Hernandez |
2007-01-23 |
| 6900969 |
ESD protection with uniform substrate bias |
Craig T. Salling |
2005-05-31 |
| 6826026 |
Output buffer and I/O protection circuit for CMOS technology |
Charvaka Duvvury |
2004-11-30 |
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Shared 5 volt tolerant ESD protection circuit for low voltage CMOS process |
Bernhard H. Andresen |
2003-03-18 |
| 6353520 |
Shared 5 volt tolerant ESD protection circuit for low voltage CMOS process |
Bernhard H. Andresen |
2002-03-05 |
| 6310379 |
NMOS triggered NMOS ESD protection circuit using low voltage NMOS transistors |
Bernhard H. Andresen |
2001-10-30 |
| 6147538 |
CMOS triggered NMOS ESD protection circuit |
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| 5487093 |
Autoranging digital analog phase locked loop |
Bernhard H. Adresen |
1996-01-23 |