Issued Patents All Time
Showing 1–25 of 25 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12006475 | Organic solid biomass conversion for liquid fuels/chemicals production in the presence of methane containing gas environment and catalyst structure | — | 2024-06-11 |
| 11833492 | Catalyst structure and method of upgrading hydrocarbons in the presence of the catalyst structure | Blair Aiken, Peng He, Shijun Meng | 2023-12-05 |
| 11725150 | Method of light oil desulfurization in the presence of methane containing gas environment and catalyst structure | Hao Xu, Zhaofei Li, Yimeng Li | 2023-08-15 |
| 11644746 | Inverse etch model for mask synthesis | Guangming Xiao | 2023-05-09 |
| 11389787 | Catalyst structure and method of upgrading hydrocarbons in the presence of the catalyst structure | Blair Aiken, Peng He, Shijun Meng | 2022-07-19 |
| 11200362 | 3D resist profile aware resolution enhancement techniques | Cheng-En Wu, James P. Shiely | 2021-12-14 |
| 10989868 | Fabric items with thermally imprinted light-emitting regions | Yi Zou, Liming Wang, Daniel A. Podhajny | 2021-04-27 |
| 10386718 | Method for modeling a photoresist profile | Cheng-En Wu, Haiqing Wei, Qiaolin Zhang | 2019-08-20 |
| 9972525 | Method for preparing trench isolation structure | Jiao Wang, Huan Yang | 2018-05-15 |
| 9646127 | 3D resist profile aware etch-bias model | Cheng-En Wu, James P. Shiely | 2017-05-09 |
| 9484186 | Modeling and correcting short-range and long-range effects in E-beam lithography | Irene Y. Su, James P. Shiely | 2016-11-01 |
| 8889535 | Semiconductor device and method for fabricating semiconductor buried layer | Hsiao-Chia Wu, Tse-Huang Lo | 2014-11-18 |
| 8858998 | Thermoresponsive arginine-based hydrogels as biologic carriers | Chih-Chang Chu | 2014-10-14 |
| 8826193 | Detection and removal of self-aligned double patterning artifacts | Yuelin Du, Gerard Luk-Pat, Alexander Miloslavsky, Benjamin D. Painter, James P. Shiely | 2014-09-02 |
| 8782591 | Physically aware logic synthesis of integrated circuit designs | Tsuwei Ku, David John Seibert, Huey-Yih Wang, Kai Zhu, Yu-Fang Chung +1 more | 2014-07-15 |
| 8689149 | Multi-patterning for sharp corner printing | Yuelin Du, James P. Shiely | 2014-04-01 |
| 8601404 | Modeling EUV lithography shadowing effect | James P. Shiely, Lena Zavyalova | 2013-12-03 |
| 8527253 | Modeling an arbitrarily polarized illumination source in an optical lithography system | Qiaolin Zhang | 2013-09-03 |
| 8443308 | EUV lithography flare calculation and compensation | James P. Shiely | 2013-05-14 |
| 8423917 | Modeling thin-film stack topography effect on a photolithography process | James P. Shiely, Qiaolin Zhang | 2013-04-16 |
| 8132128 | Method and system for performing lithography verification for a double-patterning process | Lantian Wang, Gerard Luk-Pat, James P. Shiely | 2012-03-06 |
| 8092766 | Redox method for capture of total gaseous mercury by wet FGD | S. Behrooz Ghorishi, Luis G. Velazquez-Vargas, Lei Ji | 2012-01-10 |
| 7934174 | Method and apparatus for using a database to quickly identify and correct a manufacturing problem area in a layout | Zong Wu Tang, Daniel Zhang, Juhwan Kim, Weiping Fang, Lawrence S. Melvin, III | 2011-04-26 |
| 7636904 | Locating critical dimension(s) of a layout feature in an IC design by modeling simulated intensities | Lantiang Wang, Zongwu Tang | 2009-12-22 |
| 7584450 | Method and apparatus for using a database to quickly identify and correct a manufacturing problem area in a layout | Zong Wu Tang, Daniel Zhang, Juhwan Kim, Weiping Fang, Lawrence S. Melvin, III | 2009-09-01 |