Issued Patents All Time
Showing 1–3 of 3 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10360341 | Integrated metal layer aware optimization of integrated circuit designs | Abhijeet Chakraborty, Pingkan Fok, Ramoji Karumuri Rao | 2019-07-23 |
| 8782591 | Physically aware logic synthesis of integrated circuit designs | Tsuwei Ku, Huey-Yih Wang, Hua Song, Kai Zhu, Yu-Fang Chung +1 more | 2014-07-15 |
| 7559040 | Optimization of combinational logic synthesis through clock latency scheduling | Christoph Albrecht, Andreas Kuehlmann, Sascha Richter | 2009-07-07 |