Issued Patents All Time
Showing 25 most recent of 38 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12189479 | Apparatus and method for detecting and recovering from data fetch errors | Theodros Yigzaw, Geeyarpuram N. Santhanakrishnan, Jose A. Vargas, Hisham Shafi, Michael Mishaeli +5 more | 2025-01-07 |
| 12094105 | System and method for automatic labeling of pathology images | Kevin Lee Matlock, Carlo Bifulco, Brian Donald Piening | 2024-09-17 |
| 11727010 | System and method for integrating data for precision medicine | Melvin Lathara, Brian Hill, Jaclyn Smith, Nalini Ganapati, Hollis Wright | 2023-08-15 |
| 11138201 | System and method for integrating data for precision medicine | Melvin Lathara, Brian Hill, Jaclyn Smith, Nalini Ganapati, Hollis Wright | 2021-10-05 |
| 11048587 | Apparatus and method for detecting and recovering from data fetch errors | Theodros Yigzaw, Geeyarpuram N. Santhanakrishnan, Jose A. Vargas, Hisham Shafi, Michael Mishaeli +5 more | 2021-06-29 |
| 10503517 | Method for booting a heterogeneous system and presenting a symmetric core view | Eliezer Weissmann, Rinat Rappoport, Michael Mishaeli, Hisham Shafi, Oron Lenz +19 more | 2019-12-10 |
| 10223204 | Apparatus and method for detecting and recovering from data fetch errors | Theodros Yigzaw, Geeyarpuram N. Santhanakrishnan, Jose A. Vargas, Hisham Shafi, Michael Mishaeli +5 more | 2019-03-05 |
| 10185566 | Migrating tasks between asymmetric computing elements of a multi-core processor | Alon Naveh, Yuval Yosef, Eliezer Weissmann, Anil Aggarwal, Efraim Rotem +7 more | 2019-01-22 |
| 10162687 | Selective migration of workloads between heterogeneous compute elements based on evaluation of migration performance benefit and available energy and thermal budgets | Eugene Gorbatov, Alon Naveh, Inder M. Sodhi, Eliezer Weissmann, Guarav Khanna +6 more | 2018-12-25 |
| 9910807 | Ring protocol for low latency interconnect switch | Robert G. Blankenship, Geeyarpuram N. Santhanakrishnan, Yen-Cheng Liu, Bahaa Fahim | 2018-03-06 |
| 9727345 | Method for booting a heterogeneous system and presenting a symmetric core view | Eliezer Weissmann, Rinat Rappoport, Michael Mishaeli, Hisham Shafi, Oron Lenz +19 more | 2017-08-08 |
| 9672046 | Apparatus and method for intelligently powering heterogeneous processor components | Dheeraj Subbareddy, Eugene Gorbatov, Scott D. Hahn, David A. Koufaty, Paul Brett +1 more | 2017-06-06 |
| 9639372 | Apparatus and method for heterogeneous processors mapping to virtual cores | Paolo Narvaez, Eugene Gorbatov, Dheeraj Subbareddy, Mishali Naik, Alon Naveh +11 more | 2017-05-02 |
| 9639490 | Ring protocol for low latency interconnect switch | Robert G. Blankenship, Geeyarpuram N. Santhanakrishnan, Yen-Cheng Liu, Bahaa Fahim | 2017-05-02 |
| 9575895 | Providing common caching agent for core and integrated input/output (IO) module | Yen-Cheng Liu, Robert G. Blankenship, Geeyarpuram N. Santhanakrishnan, Kenneth C. Creta, Sridhar Muthrasanallur +1 more | 2017-02-21 |
| 9501129 | Dynamically adjusting power of non-core processor circuitry including buffer circuitry | Krishnakanth V. Sistla, Dean Mulla, Vivek Garg, Mark Rowland, Suresh Doraiswamy +1 more | 2016-11-22 |
| 9448829 | Hetergeneous processor apparatus and method | Paolo Narvaez, Eugene Gorbatov, Dheeraj Subbareddy, Mishali Naik, Alon Naveh +10 more | 2016-09-20 |
| 9448879 | Apparatus and method for implement a multi-level memory hierarchy | Theodros Yigzaw, Oded Lempel, Hisham Shafi, Geeyarpuram N. Santhanakrishnan, Jose A. Vargas +6 more | 2016-09-20 |
| 9329900 | Hetergeneous processor apparatus and method | Paolo Narvaez, Eugene Gorbatov, Dheeraj Subbareddy, Mishali Naik, Alon Naveh +11 more | 2016-05-03 |
| 8984228 | Providing common caching agent for core and integrated input/output (IO) module | Yen-Cheng Liu, Robert G. Blankenship, Geeyarpuram N. Santhanakrishnan, Kenneth C. Creta, Sridhar Muthrasanallur +1 more | 2015-03-17 |
| 8966299 | Optimizing power usage by factoring processor architectural events to PMU | Yen-Cheng Liu, P Keong Or, Krishnakanth V. Sistla | 2015-02-24 |
| 8914650 | Dynamically adjusting power of non-core processor circuitry including buffer circuitry | Krishnakanth V. Sistla, Dean Mulla, Vivek Garg, Mark Rowland, Suresh Doraiswamy +1 more | 2014-12-16 |
| 8751714 | Implementing quickpath interconnect protocol over a PCIe interface | Robert J. Safranek, Debendra Das Sharma | 2014-06-10 |
| 8705311 | Forming multiprocessor systems using dual processors | Krishnakanth V. Sistla | 2014-04-22 |
| 8700933 | Optimizing power usage by factoring processor architectural events to PMU | Yen-Cheng Liu, P Keong Or, Krishnakanth V. Sistla | 2014-04-15 |