EH

Edward Hsia

AM AMD: 14 patents #820 of 9,279Top 9%
GE: 2 patents #13,562 of 36,430Top 40%
FA Fasl: 1 patents #23 of 52Top 45%
Fujitsu Limited: 1 patents #14,843 of 24,456Top 65%
UF US Air Force: 1 patents #6,190 of 16,312Top 40%
Overall (All Time): #259,884 of 4,157,543Top 7%
18
Patents All Time

Issued Patents All Time

Patent #TitleCo-InventorsDate
6967873 Memory device and method using positive gate stress to recover overerased cell Darlene Hamilton, Zhizheng Liu, Mark Randolph, Yi He, Kulachet Tanpairoj +2 more 2005-11-22
6956768 Method of programming dual cell memory device to store multiple data states per cell Darlene Hamilton, Kulachet Tanpairoj, Yi He 2005-10-18
6901010 Erase method for a dual bit memory cell Darlene Hamilton, Eric M. Ajimine, Binh Quang Le, Ken Tanpairoj 2005-05-31
6822909 Method of controlling program threshold voltage distribution of a dual cell memory device Darlene Hamilton, Mark Randolph, Edward Franklin Runnion, Kulachet Tanpairoj 2004-11-23
6813752 Method of determining charge loss activation energy of a memory array Darlene Hamilton, Wei Zheng, Mark Randolph, Kulachet Tanpairoj 2004-11-02
6791880 Non-volatile memory read circuit with end of life simulation Kazuhiro Kurihara, Binh Quang Le, Pau-Ling Chen, Darlene Hamilton 2004-09-14
6778442 Method of dual cell memory device operation for improved end-of-life read margin Darlene Hamilton, Kulachet Tanpairoj, Alykhan Madhani, Mimi Lee 2004-08-17
6775187 Method of programming a dual cell memory device Darlene Hamilton, Edward Franklin Runnion, Kulachet Tanpairoj 2004-08-10
6771545 Method for reading a non-volatile memory cell adjacent to an inactive region of a non-volatile memory cell array Eric M. Ajimine, Darlene Hamilton, Pauling Chen, Ming-Huei Shieh, Mark Randolph +2 more 2004-08-03
6768673 Method of programming and reading a dual cell memory device Darlene Hamilton, Kulachet Tanpairoj, Mimi Lee, Alykhan Madhani, Yi He 2004-07-27
6436768 Source drain implant during ONO formation for improved isolation of SONOS devices Jean Y. Yang, Mark T. Ramsbey, Emmanuil Lingunis, Yider Wu, Tazrien Kamal +2 more 2002-08-20
6381550 Method of utilizing fast chip erase to screen endurance rejects Phuong Banh, Darlene Hamilton 2002-04-30
5870407 Method of screening memory cells at room temperature that would be rejected during hot temperature programming tests Jose Hernan Hernandez, Sayan Suanya 1999-02-09
5751633 Method of screening hot temperature erase rejects at room temperature Jose Hernan Hernandez, Sayan Suanya 1998-05-12
5724365 Method of utilizing redundancy testing to substitute for main array programming and AC speed reads Darlene Hamilton, Jose Hernan Hernandez 1998-03-03
4798515 Variable nozzle area turbine vane cooling John Howard Starkweather, William K. Koffel 1989-01-17
4573865 Multiple-impingement cooled structure Raghuram J. Emani, John Howard Starkweather 1986-03-04
4526226 Multiple-impingement cooled structure Raghuram J. Emani, John Howard Starkweather 1985-07-02