Issued Patents All Time
Showing 25 most recent of 72 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7142454 | System and method for Y-decoding in a flash memory device | Tien-Chun Yang, Ming-Huei Shieh, Kurihara Kazuhiro | 2006-11-28 |
| 7076703 | Method and system for defining a redundancy window around a particular column in a memory array | Binh Quang Le | 2006-07-11 |
| 7038950 | Multi bit program algorithm | Darlene Hamilton, Ed Hsia | 2006-05-02 |
| 7026843 | Flexible cascode amplifier circuit with high gain for flash memory cells | Tien-Chun Yang | 2006-04-11 |
| 6944057 | Method to obtain temperature independent program threshold voltage distribution using temperature dependent voltage reference | Edward Franklin Runnion, Tien-Chun Yang, Binh Quang Le, Shigekazu Yamada, Darlene Hamilton +2 more | 2005-09-13 |
| 6894473 | Fast bandgap reference circuit for use in a low power supply A/D booster | Binh Quang Le, Cathy Thuvan Ly, Lee Cleveland | 2005-05-17 |
| 6859393 | Ground structure for page read and page write for flash memory | Tien-Chun Yang, Shigekazu Yamada, Ming-Huei Shieh | 2005-02-22 |
| 6819591 | Method for erasing a memory sector in virtual ground architecture with reduced leakage current | Kazuhiro Kurihara, Ming-Huei Shieh, Santosh Yachareni | 2004-11-16 |
| 6813735 | I/O based column redundancy for virtual ground with 2-bit cell flash memory | Kazuhiro Kurihara | 2004-11-02 |
| 6798275 | Fast, accurate and low power supply voltage booster using A/D converter | Binh Quang Le, Cathy Thuvan Ly, Lee Cleveland | 2004-09-28 |
| 6791880 | Non-volatile memory read circuit with end of life simulation | Kazuhiro Kurihara, Binh Quang Le, Darlene Hamilton, Edward Hsia | 2004-09-14 |
| 6781417 | Buffer driver circuit for producing a fast, stable, and accurate reference voltage | Binh Quang Le, Lee Cleveland | 2004-08-24 |
| 6771543 | Precharging scheme for reading a memory cell | Keith H. Wong, Michael Chung | 2004-08-03 |
| 6744666 | Method and system to minimize page programming time for flash memory devices | Santosh Yachareni, Kazuhiro Kurihara, Ming-Huei Shieh | 2004-06-01 |
| 6728160 | Path gate driver circuit | Tien-Chun Yang, Kurihara Kazuhiro | 2004-04-27 |
| 6700815 | Refresh scheme for dynamic page programming | Binh Quang Le, Michael Chung | 2004-03-02 |
| 6690602 | Algorithm dynamic reference programming | Binh Quang Le | 2004-02-10 |
| 6643177 | Method for improving read margin in a flash memory device | Binh Quang Le | 2003-11-04 |
| 6622201 | Chained array of sequential access memories enabling continuous read | Michael VanBuskirk | 2003-09-16 |
| 6593606 | Staggered bitline strapping of a non-volatile memory cell | Mark Randolph, Shane Hollmer, Richard Fastow | 2003-07-15 |
| 6583479 | Sidewall NROM and method of manufacture thereof for non-volatile memory cells | Richard Fastow, Shane Hollmer, Michael A. Van Buskirk, Masaaki Higashitani | 2003-06-24 |
| 6545912 | Erase verify mode to evaluate negative Vt's | Joseph G. Pawletko, Shane Hollmer | 2003-04-08 |
| 6538270 | Staggered bitline strapping of a non-volatile memory cell | Mark Randolph, Shane Hollmer, Richard Fastow | 2003-03-25 |
| 6529412 | Source side sensing scheme for virtual ground read of flash eprom array with adjacent bit precharge | Michael A. Van Buskirk, Yu Sun | 2003-03-04 |
| 6515902 | Method and apparatus for boosting bitlines for low VCC read | Michael A. Van Buskirk | 2003-02-04 |