Issued Patents All Time
Showing 1–11 of 11 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6545912 | Erase verify mode to evaluate negative Vt's | Shane Hollmer, Pau-Ling Chen | 2003-04-08 |
| 6525966 | Method and apparatus for adjusting on-chip current reference for EEPROM sensing | Shane Hollmer, Binh Quang Le | 2003-02-25 |
| 6327183 | Nonlinear stepped programming voltage | K. Michael Han, Narbeh Derhacobian | 2001-12-04 |
| 6304487 | Register driven means to control programming voltages | Binh Quang Le, Pau-Ling Chen, James Hong | 2001-10-16 |
| 6295228 | System for programming memory cells | Binh Quang Le, Pau-Ling Chen, James Hong | 2001-09-25 |
| 6246611 | System for erasing a memory cell | Binh Quang Le, James Hong, Pau-Ling Chen | 2001-06-12 |
| 6246610 | Symmetrical program and erase scheme to improve erase time degradation in NAND devices | K. Michael Han, Narbeh Derhacobian, Chi Chang | 2001-06-12 |
| 6185130 | Programmable current source | Shane Hollmer | 2001-02-06 |
| 6181605 | Global erase/program verification apparatus and method | Shane Hollmer, Michael Chung | 2001-01-30 |
| 6141244 | Multi level sensing of NAND memory cells by external bias current | Pau-Ling Chen, Shane Hollmer | 2000-10-31 |
| 5335198 | Flash EEPROM array with high endurance | Michael A. Van Buskirk, Kevin W. Plouse, Chi Chang, Sameer Haddad, Ravi Prakash Gutala | 1994-08-02 |